bq29311

SLUS487D − DECEMBER 2001 − REVISED NOVEMBER 2003

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2

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during

storage or handling to prevent electrostatic damage to the MOS gates.

PACKAGE DISSIPATION RATINGS

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

PW

874 mW

6.99 W/

°C

559 mW

454 mW

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

bq29311

Supply voltage range(2)

VCC, VPACK

−0.3 V to 34 V

VC1, VC2, VC3, VC4, VBAT

−0.3 V to 34 V

VC5, SR1, SR2

−1 V to 1 V

Input voltage range

VC1 to VC2, VC2 to VC3, VC3 to VC4, VC4 to VC5

−0.3 V to 8.5 V

Input voltage range

CLK-IN, SCLK, SDATA

−0.3 V to 7 V

CNTL

−0.3 V to 34 V

Output voltage range

DSG, CHG, PCHG

−0.3 V to VCC

Output voltage range

LEDOUT, TOUT, SCLK, SDATA, VCELL, XALERT

−0.3 V to 7 V

Current for cell balancing

10 mA

Continuous total power dissipation

See Dissipation Rating Table

(3)

HBM

1.5 kV

ESD rating(3)

CDM

250 V

ESD rating(3)

MM

50 V

Operating free-air temperature range, TA

−25

°C to 85°C

Storage temperature range, Tstg

−65

°C to 150°C

Lead temperature (soldering, 10 s)

260

°C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to ground of this device except VCn-VC(n+1), where n = 1, 2, 3, 4 cell voltage.

(3) Design considerations should be made with respect to excessive ESD.

RECOMMENDED OPERATING CONDITIONS

MIN

NOM

MAX

UNIT

Supply voltage (VCC or VPACK)

25

V

VBAT

0

VCC

VC1, VC2, VC3, VC4

0

VCC

Input voltage range, VI

SR1, SR2, VC5

−0.5

0.5

V

Input voltage range, VI

VCn −VC(n+1), (n = 1, 2, 3, 4 )

0

5

V

CNTL

VREG

Logic level input voltage

VIH

SCLK, SDATA, CLK−IN

0.8

×VREG

VREG

V

Logic level input voltage

VIL

SCLK, SDATA, CLK−IN

0

0.2

×VREG

V

XALERT

200

Output current, IO

SDATA

50

µA

Output current, IO

VCELL

±10

µA

Input current, II

CNTL

−0.5

1

µA

External 3.3-V VREG capacitor, C(REG)

VREG

1

µF

Operating ambient temperature range, TA

−25

85

°C