ST72561 datasheet(184/262 Pages) STMICROELECTRONICS

184 / 262 page

ST72561

184/262

beCAN CONTROLLER (Cont’d)

Figure 104. CAN Error State Diagram

10.9.4.5 Error Management

The error management as described in the CAN

protocol is handled entirely by hardware using a

Transmit Error Counter (TECR register) and a Re-

ceive Error Counter (RECR register), which get in-

cremented or decremented according to the error

condition. For detailed information about TEC and

REC management, please refer to the CAN stand-

ard.

Both of them may be read by software to deter-

mine the stability of the network. Furthermore, the

CAN hardware provides detailed information on

the current error status in CESR register. By

means of CEIER register and ERRIE bit in CIER

generation on error detection in a very flexible

way.

Bus-Off Recovery

The Bus-Off state is reached when TECR is great-

er then 255, this state is indicated by BOFF bit in

CESR register. In Bus-Off state, the beCAN acts

as disconnected from the CAN bus, hence it is no

longer able to transmit and receive messages.

Depending on the ABOM bit in the CMCR register

beCAN will recover from Bus-Off (become error

active again) either automatically or on software

request. But in both cases the beCAN has to wait

at least for the recovery sequence specified in the

CAN standard (128 x 11 consecutive recessive

bits monitored on CANRX).

If ABOM is set, the beCAN will start the recovering

sequence automatically after it has entered Bus-

Off state.

If ABOM is cleared, the software must initiate the

recovering sequence by requesting beCAN to en-

ter initialization mode. Then beCAN starts monitor-

ing the recovery sequence when the beCAN is re-

quested to leave the initialisation mode.

Note: In initialization mode, beCAN does not mon-

itor the CANRX signal, therefore it cannot com-

plete the recovery sequence. To recover, beCAN

must be in normal mode.

ERROR PASSIVE

When TEC or REC > 127

When TEC and REC < 128,

ERROR ACTIVE

BUS OFF

When TEC > 255

When 128 * 11 recessive bits occur:

ST72561 Datasheet(PDF) 184 Page - STMicroelectronics

ST72561 Datasheet(HTML) 184 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL