TUSB8020BPHPR datasheet(13/43 Pages) TI1

13 / 43 page

TUSB8020B

www.ti.com

SLLSEF6A – JULY 2014 – REVISED JULY 2014

8.4 Device Functional Modes

8.4.1 External Configuration Interface

The TUSB8020B supports a serial interface for configuration register access. The device may be configured by

an attached I2C EEPROM or accessed as a slave by a SMBus-capable host controller. The external interface is

enabled when both the SCL/SMBCLK and SDA/SMBDAT terminals are pulled up to 3.3 V at the deassertion of

reset. The mode, I2C master, or SMBus slave is determined by the state of SMBUSz/SS_DN2 terminal at reset.

8.4.2 I2C EEPROM Operation

The TUSB8020B supports a single-master, standard mode (100 kbit/s) connection to a dedicated I2C EEPROM

when the I2C interface mode is enabled. In I2C mode, the TUSB8020B reads the contents of the EEPROM at bus

address 1010000b using 7-bit addressing starting at address 0.

If the value of the EEPROM contents at byte 00h equals 55h, the TUSB8020B loads the configuration registers

according to the EEPROM map. If the first byte is not 55h, the TUSB8020B exits the I2C mode and continues

execution with the default values in the configuration registers. The hub will not connect on the upstream port

until the configuration is completed. If the TUSB8020B detects an unprogrammed EEPROM (value other than

55h), it enters programming mode and a programming endpoint within the hub is enabled.

Note, the bytes located above offset Ah are optional. The requirement for data in those addresses depends on

the options configured in the Device Configuration, Phy Custom Configuration, and Device Configuration 2

registers.

For details on I2C operation, refer to the UM10204 I2C-bus Specification and User Manual.

8.4.3 SMBus Slave Operation

When the SMBus interface mode is enabled, the TUSB8020B supports read block and write block protocols as a

slave-only SMBus device.

The TUSB8020B slave address is 1000 1xyz, where:

•

x is the state of GANGED/SMBA2/HS_UP terminal at reset

•

y is the state of FULLPWRMGMTz/SMBA1/SS_UP terminal at reset

•

z is the read/write bit; 1 = read access, 0 = write access.

If the TUSB8020B is addressed by a host using an unsupported protocol, it does not respond. The TUSB8020B

waits indefinitely for configuration by the SMBus host and does not connect on the upstream port until the

SMBus host indicates configuration is complete by clearing the CFG_ACTIVE bit.

For details on SMBus requirements, refer to the System Management Bus Specification.

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TUSB8020BPHPR Datasheet(PDF) 13 Page - Texas Instruments