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ST7MC1 Datasheet(PDF) 235 Page - STMicroelectronics

Part # ST7MC1
Description  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
PDF  308 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7MC1 Datasheet(HTML) 235 Page - STMicroelectronics

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10.8 10-BIT A/D CONVERTER (ADC)
10.8.1 Introduction
The on-chip Analog to Digital Converter (ADC) pe-
ripheral is a 10-bit, successive approximation con-
verter with internal sample and hold circuitry. This
peripheral has up to 16 multiplexed analog input
channels (refer to device pin out description) that
allow the peripheral to convert the analog voltage
levels from up to 16 different sources.
The result of the conversion is stored in 2 8-bit
Data Registers. The A/D converter is controlled
through a Control/Status Register.
10.8.2 Main Features
10-bit conversion
Up to 16 channels with multiplexed input
2 software-selectable sample times
External positive reference voltage VREF+ can
be independent from supply
Linear successive approximation
Data registers (DR) which contain the results
Conversion complete status flag
Maskable interrupt
On/off bit (to reduce consumption)
The block diagram is shown in Figure 127.
10.8.3 Functional Description
10.8.3.1 Analog References
VREF+ and VREF- are the high and low level refer-
ence voltage pins. Conversion accuracy may
therefore be impacted by voltage drops and noise
on these lines. VREF+ can be supplied by an inter-
mediate supply between VDDA and VSSA to
change the conversion voltage range. VREF- must
be tied to VSSA. An internal resistor bridge is im-
plemented between VREF+ and VREF- pins, with a
typical value of 15k
10.8.3.2 Analog Power Supply
VDDA and VSSA are the supply and ground pins
providing power to the converter part. They must
be tied to VDD and VSS respectively.
Figure 127. ADC Block Diagram
CS2
CS1
EOC PRSC1PRSC0 ADON
CS0
ADCCSR
AIN0
AIN1
ANALOG TO DIGITAL
CONVERTER
AINx
ANALOG
MUX
D4
D3
D5
D9
D8
D7
D6
D2
ADCDRMSB
4
fADC
D1
D0
ADCDRLSB
PRESCALER
0
0
00
00
CS3
MCCBCR
IT
request
ADCIE
ADSTS



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