DS2900 Data Sheet

Power Good (PWOK#)

PWOK# is a power good signal and will be pulled LOW by the power supply to indicate that both the outputs are above the regulation limits of the

power supply. When an output voltage falls below regulation limits or when AC power has been removed for a time sufficiently long so that power

supply operation is no longer guaranteed, PWOK will be de-asserted to a HIGH state. The start of the PWOK# delay time shall be inhibited as long

as the +12 Vdc output is in current limit or the 3.30 Vsb output is below the regulation limit.

Signal Type:

Open collector/drain output from power supply. Pull-up to 3.30Vsb external to the power

supply

PWOK = High

Power not good

PWOK = Low

Power Good

MIN

MAX

Logic level low voltage, Isink = 4 mA

0 V

0.8 V

Logic level high voltage, Isource = 200 A

2.0 V

4.125 V

Sink current, PWOK = low

4 mA

Source current, PWOK = high

2 mA

PWOK delay: T

pwok on

100 ms

1000 ms

PWOK rise and fall time

100 sec

Power down delay: T

pwok off

1 ms

1000 msec

Table 2 PWOK# Signal Characteristics

present (operational or not). This pin is connected to ground in the power supply.

AC Input Present Indicator (ACOK#)

host system side. A logic “Low” level on this signal shall indicate AC input to the power supply is present. A Logic “HIgh” on this signal shall

indiciate a loss of AC input to the power supply.

Signal Type

Pull-up to 3.30 Vsb through a resitor in the host system

Present

Not Present

Table 3 ACOK# Signal Characteristics