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ML610Q419C Datasheet(PDF) 6 Page - LAPIS Semiconductor Co., Ltd.

Part # ML610Q419C
Description  8-bit Microcontroller with a Built-in LCD driver
PDF  38 Pages
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Manufacturer  LAPIS [LAPIS Semiconductor Co., Ltd.]
Direct Link  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

ML610Q419C Datasheet(HTML) 6 Page - LAPIS Semiconductor Co., Ltd.

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FEDL610Q419-07
ML610Q419/ML610Q419C
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ML610Q419C Block Diagram
Figure 2 show the block diagram of the ML610Q419C.
"*" indicates the secondary function of each port.
Figure 2 ML610Q419C Block Diagram
Program
Memory
(Flash)
64Kbyte
+
Data
Flash
4Kbyte
SSIO
×2
SCK0*
SIN0*
SOUT0*
UART
RXD0*
TXD0*
I
2C
SDA*
SCL*
INT
2
RAM
2048byte
Interrupt
Controller
CPU (nX-U8/100)
Timing
Controller
EA
SP
On-Chip
ICE
Instruction
Decoder
BUS
Controller
Instruction
Register
TBC
INT
4
INT
1
INT
1
INT
1
WDT
INT
4
8bit Timer
×2
INT
1
PWM
GPIO
P10 to P11
P20 to P22
INT
5
P30 to P35
P40 to P47
Data-bus
PWM0*
Melody
INT
1
MD0*
TEST0
RESET_N
OSC
XT0
XT1
OSC0*
OSC1*
LSCLK*
OUTCLK*
BLD
Power
VDDL
LCD
Driver
COM0 to COM3
SEG0 to SEG39
LCD
BIAS
VL1, VL2, VL3
C1, C2
RC-ADC
×2
CS0*
IN0*
RS0*
RT0*
CRT0*
RCM*
CS1*
IN1*
RS1*
RT1*
RESET &
TEST
ALU
EPSW1～3
PSW
ELR1～3
LR
ECSR1～3
DSR/CSR
PC
GREG
0～15
VDD
VSS
INT
1
Display
register
192bit
Display Allocation
RAM
P00 to P03
TEST1_N
P50 to P53
AVDD
AVSS
12bit-ADC
AIN0, AIN1,
AIN2, AIN3
VREF
INT
1
SCK1*
SIN1*
SOUT1*
Capture
×2
P60 to P67



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