CLC2000ISO8 datasheet(15/18 Pages) EXAR

15 / 18 page

Data Sheet

15/18

Rev 1D

Overdrive Recovery

An overdrive condition is defined as the point when ei-

ther one of the inputs or the output exceed their specified

voltage range. Overdrive recovery is the time needed for

the amplifier to return to its normal or linear operating

point. The recovery time varies, based on whether the in-

put or output is overdriven and by how much the range is

exceeded. The CLC2000/CLC4000 will typically recover in

less than 40ns from an overdrive condition. Figure 5 shows

the CLC2000 in an overdriven condition.

Figure 5. Overdrive Recovery

Using the CLC2000/CLC4000 as a Differential Line Driver

The combination of good large signal bandwidth and high

output drive capability makes the CLC2000/CLC4000 well

suited for low impedance line driver applications, such

as the upstream data path for a ADSL CPE modem. The

dual channel configuration of the CLC2000 provides bet-

ter channel matching than a typical single channel device,

resulting in better overall performance in differential ap-

plications. When configured as a differential amplifier as

in figure 6, it can easily deliver the 13dBm to a standard

100Ω twisted-pair CAT3 or CAT5 cable telephone network,

as required in a ADSL CPE application.

Differential circuits have several advantages over single-

ended configurations. These include better rejection of

common mode signals and improvement of power-supply

rejection. The use of differential signaling also improves

overall dynamic performance. Total harmonic distortion

(THD) is reduced by the suppression of even signal har-

monics and the larger signal swings allow for an improved

signal to noise ratio (SNR).

VIN

Vo+

1:2

Vo-

Ro+=12.5Ω

RL=100Ω

Ro-=12.5Ω

1/2

CLC2000

1/2

CLC2000

Rf+

Rf-

VOUT

-Vs

+Vs

Figure 6: Typical Differential Transmission Line Driver

For any transmission requirement, the fundamental de-

sign parameters needed are the effective impedance of

the transmission line, the power required at the load, and

knowledge concerning the content of the transmitted sig-

nal. The basic design of such a circuit is briefly outlined

below, using the ADSL parameters as a guideline.

Data transmission techniques, such as ADSL, utilize ampli-

tude modulation techniques which are sensitive to output

clipping. A signal’s PEAK to RMS ratio, or Crest Factor (CF),

can be used to determine the adequate peak signal levels

to insure fidelity for a given signal.

For an ADSL system, the signal consists of 256 indepen-

dent frequencies with varying amplitudes. This results in

a noise-like signal with a crest factor of about 5.3. If the

driver does not have enough swing to handle the signal

peaks, clipping will occur and amplitude modulated infor-

mation can be corrupted, causing degradation in the sig-

nals Bit Error Rate.

To determine the required swing, first use the specified

load impedance to convert the RMS power to an RMS volt-

age. Then, multiply the RMS voltage by the crest factor to

get the peak values. For example 13dBm, as referenced to

1mW, is ~20mW. 20mW into the 100Ω CAT5 impedance

yields a RMS voltage of 1.413 VRMS . Using the ADSL crest

factor of 5.3 yields ~ ±7.5V peak signals.

-6

-4

-2

-3

-2

-1

100

120

140

160

180

200

Time (ns)

Output

Input

VIN = 2.5Vpp

G = 5

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