BU2152FS datasheet(8/16 Pages) ROHM

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BU2152FS

TSZ02201-0RHR1GZ00150-1-2

24.Aug.2015 Rev.002

www.rohm.com

TSZ22111・15・001

I/O Equivalence Circuits

P1 to P24

Power Dissipation

Power dissipation(total loss) indicates the power that can be consumed by IC at TA=25°C(normal temperature). IC is heated

when it consumed power, and the temperature of IC chip becomes higher than ambient temperature. The temperature that

can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited.

Power dissipation is determined by the temperature allowed in IC chip(maximum junction temperature) and thermal

resistance of package(heat dissipation capability). The maximum junction temperature is typically equal to the maximum

value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead

frame of the package. The parameter which indicates this heat dissipation capability(hardness of heat release)is called

thermal resistance, represented by the symbol θJA (°C/W).The temperature of IC inside the package can be estimated by

this thermal resistance. Figure 6 shows the model of thermal resistance of the package. Thermal resistance θJA, ambient

temperature TA, maximum junction temperature TJmax, and power dissipation PD can be calculated by the equation below:

θJA = (TJmax - TA) / PD

(°C/W)

Derating curve in Figure 7 indicates power that can be consumed by IC with reference to ambient temperature. Power that

can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC begins to attenuate at

certain ambient temperature. This gradient is determined by thermal resistance θJA. Thermal resistance θJA depends on

chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc even when the same of

package is used. Thermal reduction curve indicates a reference value measured at a specified condition.

Figure 7. Derating curve of BU2152FS

P1 to P24

VDD

DATA,CLK,STB,CLB

VSS

DATA

CLK

STB

CLB

VDD

VSS

VDD

VSS

VDD

VSS

VDD

VSS

VDD

VSS

Figure 6. Thermal resistance

θJA=(TJmax- TA)/ PD [°C/W]

[°C]

Ambient temperature TA (°C)

Chip surface temperature TJ(°C)

Power dissipation PD (W)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

100

125

Ambient Temperature [°C]

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