8P34S2108NLGI datasheet(16/20 Pages) IDT

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October 20, 2016

8P34S2108 Datasheet

Power Considerations

This section provides information on power dissipation and junction temperature for the 8P34S2108.

Equations and example calculations are also provided.

1. Power Dissipation.

The following is the power dissipation for VDD = 1.8V + 5% = 1.89V, which gives worst case results.

Maximum current at 85°C: VDD_MAX = 495mA.

▪ Power_MAX = VDD_MAX * IDD_MAX = 1.89V * 495mA = 935.55mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The

maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that

the bond wire and bond pad temperature remains below 125°C.

The equation for Tj is as follows: Tj =

JA * Pd_total + TA

Tj = Junction Temperature

JA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance

JA must be used. Assuming no air flow

and a multi-layer board, the appropriate value is 22.4°C/W per Table 11 below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.93555W * 22.4°C/W = 106.0°C. This is below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the

type of board (multi-layer).

Table 11. Thermal Resistance JA for 48-lead VFQFN, Forced Convection

JA (°C/W) vs. Air Flow (m/s)

Meters per Second

48-lead VFQFN Multi-Layer PCB, JEDEC Standard Test Boards

22.4

18.9

17.4

8P34S2108NLGI Datasheet(PDF) 16 Page - Integrated Device Technology