STM32L081CB datasheet(27/110 Pages) STMICROELECTRONICS

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STM32L081xx

Functional overview

3.14

AES

The AES Hardware Accelerator can be used to encrypt and decrypt data using the AES

algorithm (compatible with FIPS PUB 197, 2001 Nov 26).



Key scheduler



Key derivation for decryption



128-bit data block processed



128-bit key length



213 clock cycles to encrypt/decrypt one 128-bit block



Electronic codebook (ECB), cypher block chaining (CBC), and counter mode (CTR)

supported by hardware.

The AES can be served by the DMA controller.

3.15

Timers and watchdogs

The ultra-low-power STM32L081xx devices include three general-purpose timers, one low-

power timer (LPTIM), one basic timer, two watchdog timers and the SysTick timer.

Table 8 compares the features of the general-purpose and basic timers.

3.15.1

General-purpose timers (TIM2, TIM3, TIM21 and TIM22)

There are four synchronizable general-purpose timers embedded in the STM32L081xx

device (see Table 8 for differences).

TIM2, TIM3

TIM2 and TIM3 are based on 16-bit auto-reload up/down counter. It includes a 16-bit

prescaler. It features four independent channels each for input capture/output compare,

PWM or one-pulse mode output.

The TIM2/TIM3 general-purpose timers can work together or with the TIM21 and TIM22

general-purpose timers via the Timer Link feature for synchronization or event chaining.

Their counter can be frozen in debug mode. Any of the general-purpose timers can be used

to generate PWM outputs.

TIM2/TIM3 have independent DMA request generation.

Table 8. Timer feature comparison

Timer

Counter

resolution

Counter type

Prescaler factor

DMA

request

generation

Capture/compare

channels

Complementary

outputs

TIM2,

TIM3

16-bit

Up, down,

up/down

Any integer between

1 and 65536

Yes

TIM21,

TIM22

16-bit

Up, down,

up/down

Any integer between

1 and 65536

TIM6,

TIM7

16-bit

Any integer between

1 and 65536

Yes

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