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STM32F091CB Datasheet(PDF) 97 Page - STMicroelectronics |
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STM32F091CB Datasheet(HTML) 97 Page - STMicroelectronics |
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97 / 127 page ![]() DocID026284 Rev 3 97/127 STM32F091xB STM32F091xC Electrical characteristics 99 Figure 30. SPI timing diagram - master mode 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. Table 69. I2S characteristics(1) Symbol Parameter Conditions Min Max Unit fCK 1/tc(CK) I2S clock frequency Master mode (data: 16 bits, Audio frequency = 48 kHz) 1.597 1.601 MHz Slave mode 0 6.5 tr(CK) I2S clock rise time Capacitive load CL = 15 pF -10 ns tf(CK) I2S clock fall time - 12 tw(CKH) I2S clock high time Master fPCLK= 16 MHz, audio frequency = 48 kHz 306 - tw(CKL) I2S clock low time 312 - tv(WS) WS valid time Master mode 2 - th(WS) WS hold time Master mode 2 - tsu(WS) WS setup time Slave mode 7 - th(WS) WS hold time Slave mode 0 - DuCy(SCK) I2S slave input clock duty cycle Slave mode 25 75 % |
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