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STM32L071KB Datasheet(PDF) 15 Page - STMicroelectronics

Part # STM32L071KB
Description  Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 192KB Flash, 20KB SRAM, 6KB EEPROM, ADC
PDF  136 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L071KB Datasheet(HTML) 15 Page - STMicroelectronics

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STM32L071xx
Functional overview
32
Stop mode without RTC
The Stop mode achieves the lowest power consumption while retaining the RAM and
register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, HSE and
LSE crystal oscillators are disabled.
Some peripherals featuring wakeup capability can enable the HSI RC during Stop
mode to detect their wakeup condition.
The voltage regulator is in the low-power mode. The device can be woken up from Stop
mode by any of the EXTI line, in 3.5 µs, the processor can serve the interrupt or
resume the code. The EXTI line source can be any GPIO. It can be the PVD output, the
comparator 1 event or comparator 2 event (if internal reference voltage is on). It can
also be wakened by the USART/I2C/LPUART/LPTIMER wakeup events.
Standby mode with RTC
The Standby mode is used to achieve the lowest power consumption and real time
clock. The internal voltage regulator is switched off so that the entire VCORE domain is
powered off. The PLL, MSI RC, HSE crystal and HSI RC oscillators are also switched
off. The LSE or LSI is still running. After entering Standby mode, the RAM and register
contents are lost except for registers in the Standby circuitry (wakeup logic, IWDG,
RTC, LSI, LSE Crystal 32 KHz oscillator, RCC_CSR register).
The device exits Standby mode in 60 µs when an external reset (NRST pin), an IWDG
reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or Alarm B),
RTC tamper event, RTC timestamp event or RTC Wakeup event occurs.
Standby mode without RTC
The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire VCORE domain is powered off. The
PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillators are also switched off.
After entering Standby mode, the RAM and register contents are lost except for
registers in the Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32 KHz
oscillator, RCC_CSR register).
The device exits Standby mode in 60 µs when an external reset (NRST pin) or a rising
edge on one of the three WKUP pin occurs.
Note:
The RTC, the IWDG, and the corresponding clock sources are not stopped automatically by
entering Stop or Standby mode.
Table 3. Functionalities depending on the operating power supply range
Operating power supply
range
Functionalities depending on the operating power supply range
ADC operation
Dynamic voltage
scaling range
I/O operation
VDD = 1.65 to 1.71 V
ADC only,
conversion time up
to 570 ksps
Range 2 or
range 3
Degraded speed
performance
VDD = 1.71 to 1.8 V(1)
ADC only,
conversion time up
to 1.14 Msps
Range 1, range 2 or
range 3
Degraded speed
performance
VDD = 1.8 to 2.0 V(1)
Conversion time up
to 1.14 Msps
Range1, range 2 or
range 3
Degraded speed
performance



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