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DAC38RF83IAAVR Datasheet(PDF) 81 Page - Texas Instruments |
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DAC38RF83IAAVR Datasheet(HTML) 81 Page - Texas Instruments |
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81 / 152 page ![]() 81 DAC38RF80, DAC38RF83, DAC38RF84 DAC38RF85, DAC38RF90, DAC38RF93 www.ti.com SLASEA3 – DECEMBER 2016 Product Folder Links: DAC38RF80 DAC38RF83 DAC38RF84 DAC38RF85 DAC38RF90 DAC38RF93 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 8.5.9 SYSREF Align to r1 and r3 Count Register (address = 0x78) [reset = 0x0000] Figure 78. SYSREF Align to r1 and r3 Count Register (SYSREF_ALIGN_R) 15 14 13 12 11 10 9 8 0 0 0 0 0 0 0 x R R R R R R R R 7 6 5 4 3 2 1 0 0 1 1 1 1 0 0 0 R R R R R R R R LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 50. SYSREF_ALIGN_R Field Descriptions Bit Field Type Reset Description 15:8 ALIGN_TO_R1_CNT R 0x00 Part of the SYSREF Align block 7:0 ALIGN_TO_R3_CNT R 0x00 Part of the SYSREF Align block 8.5.10 SYSREF Phase Count 1 and 2 Register (address = 0x79) [reset = 0x0000] Figure 79. SYSREF Phase Count 1 and 2 Register (SYSREF12_CNT) 15 14 13 12 11 10 9 8 0 0 0 0 0 0 0 x R R R R R R R R 7 6 5 4 3 2 1 0 0 1 1 1 1 0 0 1 R R R R R R R R LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 51. SYSREF12_CNT Field Descriptions Bit Field Type Reset Description 15:8 PHASE2_CNT R 0x00 Part of the SYSREF Align block 7:0 PHASE1_CNT R 0x00 Part of the SYSREF Align block |
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