TUSB422 datasheet(12/71 Pages) TI1

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TUSB422

SLLSEW6 – NOVEMBER 2016

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Upon enabling TUSB422 for DFP, the TUSB422 will continuously monitor both CC1 and CC2 for a connection.

After a connection has been determined, the TUSB422 will notify system of event by asserting the INT_N pin

low. Upon detecting assertion of INT_N, the external microprocessor should read and clear the appropriate Alert

registers.

The following steps are for initialization of the TUSB422 for DFP operation.

1. Upon TUSB422 power-up, the Power Status flag in Alert Register should get set indicating TUSB422 is

initialized. When set, this flag will cause the INT_N pin to be assert low.

2. SW read the Alert Registers to determine reason for INT_N assertion. The expectation is Power Status bit

(Reg10h bit 1) is set.

3. SW read Power Status register and notice that TCPC_INIT_STATUS flag is cleared. This indicates TUSB422

is ready.

4. SW clear Power Status bit in Alert register by writing a 1’b1 to the bit.

5. Program the TUSB422 to present Rp on both CC pins. This is done by writing 0x05 to the Role Control

0x25 for 3 A current advertisement

6. Write Look4Connection command to the Command register.

7. The TUSB422 now presents Rp on both CC pins and look for a connection.

NOTE

Because TUSB422 supports Dead Battery Mode, a dedicated DFP application (like a Car

Charger) which uses the TUSB422 should incorporate a diode in the source power path

circuitry to block VBUS from being received by another attached DFP/DRP that is

providing VBUS.

7.3.4 UFP (Upstream Facing Port)

A UFP is a port that will present Rd on its CC pins and sink VBUS. The TUSB422 functions as a UFP by

programming the Role Control register to 0x0A. This will cause TUSB422 to present a Rd on both CC pins.

The following steps are for initialization of the TUSB422 for DFP operation.

1. Upon TUSB422 power-up, the Power Status flag in Alert Register should get set indicating TUSB422 is

initialized. When set, this flag will cause the INT_N pin to be assert low.

2. SW read the Alert Registers to determine reason for INT_N assertion. The expectation is Power Status bit

(Reg10h bit 1) is set.

3. SW read Power Status register and notice that TCPC_INIT_STATUS flag is cleared. This indicates TUSB422

is ready.

4. SW clear Power Status bit in Alert register by writing a 1’b1 to the bit.

5. Program the TUSB422 to present Rd on both CC pins. This is done by writing 0x0A to the Role Control

6. Write Look4Connection command to the Command register.

7. The TUSB422 now presents Rd on both CC pins and look for a connection.

7.3.5 DRP (Dual-Role Port)

A Dual-Role port functions as both a DFP and a UFP. The TUSB422 supports DRP either autonomously or

manually. In autonomous DRP mode, the TUSB422 state machine toggles between UFP (Rd) and DFP (Rp) on

both its CC pins. Autonomous DRP is enabled by programming Role Control register to 0x4A and writing

Looking4Connection command to the Command register. Manual mode is under complete control of external

processor. External processor must toggle between writing 0x0A and 0x05 to Role Control register at interval

defined by Type-C specification summarized in Table 2.

Table 2. USB Type-C DRP Toggle Requirements

PARAMETER

MIN

MAX

DESCRIPTION

tDRP

50 ms

100 ms

The period a DRP shall complete a Source (Rp) to Sink (Rd) and back

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