Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

MIC4607 Datasheet(PDF) 19 Page - Microchip Technology

Part # MIC4607
Description  85V, Three-Phase MOSFET Driver with Adaptive Dead-Time, Anti-Shoot-Through and Overcurrent Protection
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC4607 Datasheet(HTML) 19 Page - Microchip Technology

Back Button MIC4607 Datasheet HTML 15Page - Microchip Technology MIC4607 Datasheet HTML 16Page - Microchip Technology MIC4607 Datasheet HTML 17Page - Microchip Technology MIC4607 Datasheet HTML 18Page - Microchip Technology MIC4607 Datasheet HTML 19Page - Microchip Technology MIC4607 Datasheet HTML 20Page - Microchip Technology MIC4607 Datasheet HTML 21Page - Microchip Technology MIC4607 Datasheet HTML 22Page - Microchip Technology MIC4607 Datasheet HTML 23Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 42 page
background image
 2016 Microchip Technology Inc.
DS20005610A-page 19
MIC4607
4.4
Overcurrent Timing Diagram
The motor current is sensed in an external resistor that
is connected between the low-side MOSFET’s source
pins and ground. If the sense resistor voltage exceeds
the rising overcurrent threshold (typically 0.2V), all LO
and HO outputs are latched off and the FLT/ pin is
pulled low. Once the outputs are latched off, an internal
current source (typically 0.44 μA) begins to charge up
the external CDLY capacitor. The outputs remain
latched off and all xLI/xHI (or xPWM) input signals are
ignored until the voltage on the CDLY capacitor rises
above the VDLY+ threshold (typically 1.5V), which
resets the latch on the first rising edge of any LI input of
the MIC4607-1 (or falling edge on any PWM input for
the MIC4607-2).
Once this occurs, the CDLY capacitor is discharged, the
FLT/ pin returns to a high impedance state and all out-
puts will respond to their respective input signals.
On startup, the current limit latch is reset during a rising
VDD or a rising EN pin voltage to assure normal opera-
tion.
FIGURE 4-4:
Overcurrent Timing Diagram.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com