MCP79412 datasheet(39/66 Pages) MICROCHIP

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DS20002266H-page 39

MCP79410/MCP79411/MCP79412

6.2

EEPROM

The MCP7941X features 1 Kbits of EEPROM

organized in 8-byte pages with software write

protection configured through the STATUS register.

6.2.1

STATUS REGISTER

The STATUS register contains bits BP<1:0> which are

used to set the block write protection for the EEPROM

array.

The STATUS register is a nonvolatile Control register

in the EEPROM address space at location 0xFF. The

STATUS register is accessed using control byte

'1010111X'. Setting the BP<1:0> bits in the STATUS

EEPROM array per Table 6-1.

If multiple bytes are loaded to the STATUS register,

only the last byte is written. The write to the STATUS

6.2.2

EEPROM BYTE WRITE

Following the Start condition from the master, the

control code and the R/W bit (which is a logic low) are

clocked onto the bus by the master transmitter. This

indicates to the addressed slave receiver that the

address byte will follow after it has generated an

Acknowledge bit during the ninth clock cycle.

Therefore, the next byte transmitted by the master is

the address and will be written into the Address Pointer

the

MCP7941X.

After

receiving

another

Acknowledge bit from the MCP7941X, the master

device transmits the data byte to be written into the

addressed

memory

location.

The

MCP7941X

acknowledges again and the master generates a Stop

condition. This initiates the internal write cycle and,

during this time, the MCP7941X does not generate

Acknowledge signals for EEPROM commands. Access

to the RTCC registers and SRAM is still possible during

an EEPROM write cycle.

If an attempt is made to write to an address outside of

the defined regions, the MCP7941X will not

acknowledge the address or data bytes, no data will be

written, and the device will immediately accept a new

command. After a Byte Write command, the internal

Address Pointer will point to the address location

following the one that was just written.

TABLE 6-1:

BLOCK PROTECTION

BP1

BP0

Array Addresses

Write-Protected

None

Upper 1/4

(60h-7Fh)

Upper 1/2

(40h-7Fh)

All

(00h-7Fh)

STATUS: EEPROM BLOCK PROTECTION CONTROL REGISTER

(ADDRESS 0XFF)

R/W-0

—

BP1

BP0

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is clear

X = Bit is unknown

bit 7-4

Unimplemented:

Read as ‘0’

bit 3-2

BP<1:0>:

EEPROM Array Block Protection bits

bit 1-0

Unimplemented:

Read as ‘0’

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