CS35L00 datasheet(28/34 Pages) CIRRUS

28 / 34 page

CS35L00

DS906PP1

Note:

19. “Idle Current Draw vs. VBATT - FHD Mode” capacitor values refer to CFILT when configured as the

“CS35L00’s Minimized Optional Output Filtering” shown in Figure 5 on page 17. When VBATT is

below “VBATT Limit for HD/FHD Mode” (VBLIM), operation is restricted to SD Mode.

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

2.5

3.0

3.5

4.0

4.5

5.0

5.5

VBATT Supply Voltage (V)

0.00

0.50

1.00

1.50

2.00

2.50

3.00

3.50

4.00

4.50

2.53

3.544.5

5.5

VBATT Supply Voltage (V)

Figure 50. Idle Current Draw vs. VBATT - FHD Mode

RL =8 Ω +33 μH (Note 19)

Figure 51. Output Power vs. VBATT - FHD Mode

RL = 8 Ω

1% THD+N Ratio

RL = 8 Ω

10% THD+N Ratio

RL = 4 Ω

1% THD+N Ratio

RL = 4 Ω

10% THD+N Ratio

470 pF

No Filter

1000 pF

2200 pF

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

250

500

750

1000

1250

1500

1750

2000

Output Power (mW)

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

500

1000

1500

2000

2500

3000

3500

Output Power (mW)

Figure 52. Efficiency vs. Output Power - FHD Mode

RL =8 Ω +33 μH

Figure 53. Efficiency vs. Output Power - FHD Mode

RL =4 Ω +33 μH

4.2 V

3.7 V

4.2 V

3.7 V

5.0 V

100

150

200

250

300

350

400

450

250

500

750

1000

1250

1500

1750

2000

Output Power (mW)

100

200

300

400

500

600

700

800

500

1000

1500

2000

2500

3000

3500

Output Power (mW)

Figure 54. Supply Current vs. Output Power - FHD Mode

RL =8 Ω +33 μH

Figure 55. Supply Current vs. Output Power - FHD Mode

RL =4 Ω +33 μH

5.0 V

4.2 V

3.7 V

5.0 V

4.2 V

3.7 V

CS35L00 Datasheet(PDF) 28 Page - Cirrus Logic

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