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KPC6N137HTLD Datasheet(PDF) 4 Page - COSMO Electronics Corporation |
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KPC6N137HTLD Datasheet(HTML) 4 Page - COSMO Electronics Corporation |
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4 / 12 page ![]() Cosmo Electronics Corp. Document No. 69P51003.3 - 4 - http://www.cosmo-ic.com cosmo KPC6N137 Series 8PIN HIGH-SPEED OUTPUT PHOTOCOUPLER Propagation delay time Output (0) (1) (*7) tPLH IF=7.5mA,VCC=5V,RL=350Ω, CL=15pF,Ta=25℃ - 45 75 ns Propagation delay time Output (1) (0) (*7) tPHL - 45 75 ns Output rise-fall time (10 to 90%) tr,tf IF=7.5mA,VCC=5V,RL=350Ω,CL=15pF – 30 - ns Enable propagation delay time Output (1) (0) (*8) tELH IF=7.5mA,RL=350Ω,CL=15pF, VEH=3.0V, VEL=0.5V – 40 - ns Enable propagation delay time Output (0) (1) (*8) tEHL - 15 - ns Instantaneous common mode rejection voltage “output(0)” (*9) CMH IF=0mA, VCM=10V,VO(Min)=2.0V RL=350Ω - 500 - V/us Instantaneous common mode rejection voltage “output(1)” (*9) CML IF=5mA, VCM=10V,VO(Max)=0.8V RL=350Ω - -500 - V/us Note ) Typical values are all at Vcc = 5V, Ta= 25°C *1 Ta=0 to 70°C. *2 Pulse width <= 1ms *3 40 to 80%RH AC for 1 minute ,f=60HZ. *4 At Iin =10mA, VF decreases at the rate of 1.6mV/°C if the temperature goes up.*6 Ta=0 to 70°C. *5 Measured as 2-pin element. Connect pins 2 and 3, connect pins 5, 6, 7 and 8. *6 DC current transfer ratio is defined as the ratio of output collector current to forward bias input current. *7 Refer to the Fig. 1. *8 Refer to the Fig. 2. *9 CMH represents a common mode voltage ignorable rise time ratio that can hold logic (1) state in output. CML represents a common mode voltage ignorable fall time ratio that can hold logic (0) state in output. Circuit Block Diagram |
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