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LM2619MTC Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM2619MTC
Description  500mA Step-Down DC-DC Converter
PDF  16 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2619MTC Datasheet(HTML) 4 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
PVIN, VDD to SGND
−0.2V to +6V
PGND to SGND, PVIN to VDD
−0.2V to +0.2V
EN, EAOUT, EANEG, SYNC/MODE
to SGND
−0.2V to +6V
FB, SW
(GND −0.2V) to
(VDD +0.2V)
Storage Temperature Range
−45˚C to +150˚C
Lead Temperature
(Soldering, 10 sec.)
300˚C
Junction Temperature (Note 2)
+125˚C
Ambient Temperature Range
-25˚C to 85˚C
Minimum ESD Rating
±2kV
(Human Body Model, C = 100 pF, R = 1.5 k
Ω)
Thermal Resistance (
θ
JA) (Note 3)
110˚C/W
Electrical Characteristics
Specifications with standard typeface are for T
A = 25˚C, and those in boldface type apply over the full Operating Junction
Temperature Range of T
J = −25˚C to +125˚C. Unless otherwise specified, PVIN = VDD = EN = SYNC/MODE = 3.6V.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IN
Input Voltage Range
PVIN = VDD = V
IN (Note 4)
2.8
3.6
5.5
V
V
FB
Feedback Voltage
1.470
1.50
1.530
V
V
HYST
PFM Comparator Hysteresis
Voltage
PFM Mode (SYNC/MODE =
0V) (Note 5)
29
mV
I
SHDN
Shutdown Supply Current
VIN = 3.6V, EN = 0V
0.02
0.3
µA
I
Q1_PWM
DC Bias Current into VDD
SYNC/MODE = VIN
FB=2V
600
725
µA
I
Q2_PFM
SYNC/MODE = 0V
FB=2V
160
195
µA
R
DSON (P)
Pin-Pin Resistance for
P FET
(Note 6)
500
630
m
Ω
R
DSON (N)
Pin-Pin Resistance for
N FET
(Note 6)
420
550
m
Ω
R
DSON (TC)
FET Resistance
Temperature Coefficient
0.5
%/C
I
LIM
Switch Peak Current Limit
(Note 7)
620
850
1100
mA
V
IH
Logic High Input, EN,
SYNC/MODE
0.95
1.3
V
V
IL
Logic Low Input, EN,
SYNC/MODE
0.4
0.80
V
F
SYNC
SYNC/MODE Clock
Frequency Range
(Note 8)
500
1000
kHz
F
OSC
Internal Oscillator
Frequency
PWM Mode
468
640
800
kHz
T
min
Minimum ON-Time of PFET
Switch in PWM Mode
200
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but device specifications may not be guaranteed. For guaranteed specifications and associated test conditions, see the Min and Max limits and Conditions
in the Electrical Characteristics table. Typical (typ) specifications are mean or average values at 25˚C and are not guaranteed.
Note 2: Thermal shutdown will occur if the junction temperature exceeds 150˚C.
Note 3: Thermal resistance specified with 4" x 3" JEDEC (2 layer 2 oz Cu.) board.
Note 4: The LM2619MTC is designed for mobile phone applications where turn-on after system power-up is controlled by the system controller. Thus, it should be
kept in shutdown by holding the EN pin low until the input voltage exceeds 2.8V.
Note 5: The hysteresis voltage is the minimum voltage swing on the FB pin that causes the internal feedback and control circuitry to turn the internal PFET switch
on and then off during PFM mode. When resistor dividers are used like in the operating circuit of Figure 4, the hysteresis at the output will be the value of the
hysteresis at the feedback pin times the resistor divider ratio. In this case, 24mV (typ) x ((46.4k + 33.2k)/33.2k).
Note 6: RDSON is specified by having the two PVIN pins connected together,two PGND pins connected together and the two SW pins connected together.
Note 7: Current limit is built-in, fixed, and not adjustable. If the current limit is reached while the voltage at the FB pin is pulled below 0.7V, the internal PFET switch
turns off for 2.5µs to allow the inductor current to diminish.
Note 8: SYNC driven with an external clock switching between VIN and GND. When an external clock is present at SYNC; the IC is forced to be in PWM mode at
the external clock frequency. The LM2619MTC synchronizes to the rising edge of the external clock.
www.national.com
4
PrintDate=2003/08/20 PrintTime=18:54:05 801627bc ds200651_p Rev. No. 1.25
cmserv
Proof
Seq=4



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