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SL28PCIe25ALIT Datasheet(PDF) 11 Page - Silicon Laboratories |
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SL28PCIe25ALIT Datasheet(HTML) 11 Page - Silicon Laboratories |
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11 / 17 page  SL28PCIe25 DOC#: SP-AP-0776 (Rev. 0.2) Page 11 of 16 AC Electrical Specifications Parameter Description Condition Min. Max. Unit Crystal LACC Long-term Accuracy Measured at VDD/2 differential – 250 ppm Clock Input TDC CLKIN Duty Cycle Measured at VDD/2 47 53 % TR/TF CLKIN Rise and Fall Times Measured between 0.2VDD and 0.8VDD 0.5 4.0 V/ns TCCJ CLKIN Cycle to Cycle Jitter Measured at VDD/2 – 250 ps TLTJ CLKIN Long Term Jitter Measured at VDD/2 – 350 ps VIH Input High Voltage XIN / CLKIN pin 2 VDD+0.3 V VIL Input Low Voltage XIN / CLKIN pin – 0.8 V IIH Input HighCurrent XIN / CLKIN pin, VIN = VDD – 35 uA IIL Input LowCurrent XIN / CLKIN pin, 0 < VIN <0.8 -35 – uA SRC at 0.7V TDC SRC Duty Cycle Measured at 0V differential 45 55 % TPERIOD 100 MHz SRC Period Measured at 0V differential at 0.1s 9.99900 10.0010 ns TPERIODSS 100 MHz SRC Period, SSC Measured at 0V differential at 0.1s 10.02406 10.02607 ns TPERIODAbs 100 MHz SRC Absolute Period Measured at 0V differential at 1 clock 9.87400 10.1260 ns TPERIODSSAbs 100 MHz SRC Absolute Period, SSC Measured at 0V differential at 1 clock 9.87406 10.1762 ns TCCJ SRC Cycle to Cycle Jitter Measured at 0V differential – 125 ps RMSGEN1 Output PCIe* Gen1 REFCLK phase jitter BER = 1E-12 (including PLL BW 8 - 16 MHz, ζ = 0.54, Td=10 ns, Ftrk=1.5 MHz) 0108 ps RMSGEN2 Output PCIe* Gen2 REFCLK phase jitter Includes PLL BW 8 - 16 MHz, Jitter Peaking = 3dB, ζ = 0.54, Td=10 ns), Low Band, F < 1.5MHz 03.0 ps RMSGEN2 Output PCIe* Gen2 REFCLK phase jitter Includes PLL BW 8 - 16 MHz, Jitter Peaking = 3dB, ζ = 0.54, Td=10 ns), Low Band, F < 1.5MHz 03.1 ps RMSGEN3 Output phase jitter impact – PCIe* Gen3 Includes PLL BW 2 - 4 MHz, CDR = 10MHz) 01.0 ps LACC SRC Long Term Accuracy Measured at 0V differential – 100 ppm TR / TF SRC Rising/Falling Slew Rate Measured differentially from ±150 mV 2.5 8 V/ns VHIGH Voltage High 1.15 V VLOW Voltage Low –0.3 – V VOX Crossing Point Voltage at 0.7V Swing 300 550 mV REF at 3.3V TDC Duty Cycle Measurement at 1.5V 45 55 % TPERIOD Period Measurement at 1.5V 39.996 40.004 ns TPERIODAbs Absolute Period Measurement at 1.5V 39.32360 40.67640 ns TR / TF Rising and Falling Edge Rate Measured between 0.8V and 2.0V 1.0 4.0 V/ns TCCJ Cycle to Cycle Jitter Measurement at 1.5V – 250 ps LACC Long Term Accuracy Measured at 1.5V – 100 ppm |
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