1997 Feb 13

15

Philips Semiconductors

Product specification

256 to 1024

× 8-bit CMOS EEPROMs with

PCF85xxC-2 family

Fig.13 Page mode.

handbook, full pagewidth

td

t HIGH

f

t

r

t

LOW

t

STOP

12

PTC

SDA

SCL

MBA699

1153

Fig.14 External clock.

(1) If an external clock is chosen, this information is latched internally by setting pin 7 (PTC) LOW after transmission of the eighth bits of the word

address (negative edge of SCL). Thus the state of pin 7 may be previously undefined. Leaving pin 7 LOW causes a higher standby current.

(2) 1-byte programming.

(3) 2-byte programming.

(4) One page (8 bytes) programming.

handbook, full pagewidth

S

0 A

A

DATA

A

DATA

A

P

SLAVE ADDRESS

WORD ADDRESS

(1)

undefined

1

1

1

2

2

2

257

513

1153

clock (2)

clock (3)

clock (4)

d

t

0

negative edge

SCL 8-bit

undefined

LOW

HIGH

PTC

2

I C-bus

MBA700