MPC9446 datasheet(5/12 Pages) MOTOROLA

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MPC9446

TIMING SOLUTIONS

MOTOROLA

Table 8: DC CHARACTERISTICS (VCC =VCCA =VCCB =VCCC =2.5V ±5%, TA =--40°Cto+85°C)

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

VIH

Input High Voltage

1.7

VCC +0.3

LVCMOS

VIL

Input Low Voltage

-0.3

0.7

LVCMOS

VOH

Output High Voltage

1.8

IOH=-15 mAa

VOL

Output Low Voltage

0.6

IOL=15mA

ZOUT

Output Impedance

17 - 20b

Ω

IIN

Input Currentb

±200

µA

VIN=GND or VIN=VCC

ICCQc

Maximum Quiescent Supply Current

2.0

All VCC Pins

a. The MPC9446 is capable of driving 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated transmission

line to a termination voltage of VTT. Alternatively, the device drives up to two 50Ω series terminated transmission lines per output.

b. Input pull-up / pull-down resistors influence input current.

c. ICCQ is the DC current consumption of the device with all outputs open and the input in its default state or open.

Table 9: AC CHARACTERISTICS (VCC =VCCA =VCCB =VCCC =2.5V ±5%, TA =--40°Cto+85°C)ab

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

fref

Input Frequency

250c

MHz

fMAX

Maximum Output Frequency

÷1 output

÷2 output

250b

125

MHz

FSELx=0

FSELx=1

tP, REF

Reference Input Pulse Width

1.4

tr,tf

CCLK Input Rise/Fall Time

1.0d

0.7to1.7V

tPLH

tPHL

Propagation delay

CCLK0,1 to any Q

2.6

5.6

5.5

tPLZ, HZ

Output Disable Time

tPZL, LZ

Output Enable Time

tsk(O)

Output-to-output Skew

Within one bank

Any output bank, same output divider

Any output, Any output divider

150

200

350

tsk(PP)

Device-to-device Skew

3.0

tSK(P)

DCQ

Output pulse skewe

Output Duty Cycle

÷1or ÷2 output

200

DCREF = 50%

tr,tf

Output Rise/Fall Time

0.1

1.0

0.6to1.8V

a. AC characteristics apply for parallel output termination of 50Ω to VTT.

b. AC specifications are design targets, final specification is pending device characterization.

c. The MPC9446 is functional up to an input and output clock frequency of 350 MHz and is characterized up to 250 MHz.

d. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input

pulse width, output duty cycle and maximum frequency specifications.

e. Output pulse skew is the absolute difference of the propagation delay times: | tpLH -tpHL |.

Table 10: AC CHARACTERISTICS (VCC =3.3V+5%, VCCA,VCCB,VCCC = 2.5V + 5% or 3.3V + 5%,

TA =--40°Cto+85°C)ab

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

tsk(O)

Output-to-output Skew

Within one bank

Any output bank, same output divider

Any output, Any output divider

150

250

350

tsk(PP)

Device-to-device Skew

2.5

tPLH,HL

Propagation delay

CCLK0,1 to any Q

See 3.3V table

tSK(P)

DCQ

Output pulse skewc

Output Duty Cycle

÷1or ÷2 output

250

DCREF = 50%

a. AC characteristics apply for parallel output termination of 50Ω to VTT.

b. For all other AC specifications, refer to 2.5V or 3.3V tables according to the supply voltage of the output bank.

c. Output pulse skew is the absolute difference of the propagation delay times: | tpLH -tpHL |.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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