DS21352 datasheet(13/137 Pages) DALLAS

13 / 137 page

DS21352/DS21552

13 of 137

Table 4-1 PIN DESCRIPTION SORTED BY PIN SYMBOL

SYMBOL

TYPE

DESCRIPTION

8MCLK

8.192 MHz Clock

8XCLK

Eight Times Clock

Address Bus Bit 0

Address Bus Bit 1

Address Bus Bit 2

Address Bus Bit 3

Address Bus Bit 4

Address Bus Bit 5

Address Bus Bit 6

ALE (AS)/A7

Address Latch Enable/Address Bus Bit 7

BTS

Bus Type Select

Carry In

Carry Out

CS*

Chip Select

D0/AD0

I/O

Data Bus Bit0/ Address/Data Bus Bit 0

D1/AD1

I/O

Data Bus Bit1/ Address/Data Bus Bit 1

D2/AD2

I/O

Data Bus Bit 2/Address/Data Bus 2

D3/AD3

I/O

Data Bus Bit 3/Address/Data Bus Bit 3

D4/AD4

I/O

Data Bus Bit4/Address/Data Bus Bit 4

D5/AD5

I/O

Data Bus Bit 5/Address/Data Bus Bit 5

D6/AD6

I/O

Data Bus Bit 6/Address/Data Bus Bit 6

D7/AD7

I/O

Data Bus Bit 7/Address/Data Bus Bit 7

DVDD

–

Digital Positive Supply

DVDD

–

Digital Positive Supply

DVSS

–

Digital Signal Ground

DVSS

–

Digital Signal Ground

DVSS

–

Digital Signal Ground

DVSS

–

Digital Signal Ground

FMS

Framer Mode Select

DVDD

Digital Positive Supply

DVDD

–

Digital Positive Supply

INT*

Interrupt

JTCLK

IEEE 1149.1 Test Clock Signal

JTDI

IEEE 1149.1 Test Data Input

JTDO

IEEE 1149.1 Test Data Output

JTMS

IEEE 1149.1 Test Mode Select

JTRST

IEEE 1149.1 Test Reset

LIUC

Line Interface Connect

MCLK

Master Clock Input

MUX

Bus Operation

–

No Connect

–

No Connect

–

No Connect

–

No Connect

–

No Connect

Table 4-1 PIN DESCRIPTION SORTED BY PIN SYMBOL (cont.)

SYMBOL

TYPE

DESCRIPTION

–

No Connect

–

No Connect

RCHBLK

Receive Channel Block

RCHCLK

Receive Channel Clock

RCL

Receive Carrier Loss

RCLK

Receive Clock

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