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MBR120LSF Datasheet(PDF) 4 Page - ON Semiconductor |
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MBR120LSF Datasheet(HTML) 4 Page - ON Semiconductor |
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4 / 5 page ![]() MBR120LSF, NRVB120LSF http://onsemi.com 4 12 0 VR, REVERSE VOLTAGE (VOLTS) 1000 100 10 6.0 2.0 4.0 8.0 10 TJ = 25°C 20 14 16 18 Figure 7. Capacitance 12 0 VR, DC REVERSE VOLTAGE (VOLTS) 125 100 65 6.0 2.0 4.0 8.0 10 20 14 16 18 Figure 8. Typical Operating Temperature Derating* * Reverse power dissipation and the possibility of thermal runaway must be considered when operating this device under any re- verse voltage conditions. Calculations of TJ therefore must include forward and reverse power effects. The allowable operating TJ may be calculated from the equation: TJ = TJmax − r(t)(Pf + Pr) where r(t) = thermal impedance under given conditions, Pf = forward power dissipation, and Pr = reverse power dissipation This graph displays the derated allowable TJ due to reverse bias under DC conditions only and is calculated as TJ = TJmax − r(t)Pr, where r(t) = Rthja. For other power applications further calculations must be performed. 70 75 80 85 90 95 105 110 115 120 RqJA = 25.6°C/W 400 °C/W 324.9 °C/W 235 °C/W 130 °C/W Figure 9. Thermal Response 1000 0.1 0.00001 t1, TIME (sec) 1000 1 0.0001 0.001 0.01 1 10 100 0.000001 0.1 10 100 P(pk) t1 t2 DUTY CYCLE, D = t1/t2 qJA = 321.8 °C/W Test Type > Min Pad < Die Size 38x38 @ 75% mils D = 0.5 SINGLE PULSE 0.2 0.1 0.05 0.01 |
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