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MP7541BJS Datasheet(PDF) 1 Page - Exar Corporation |
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MP7541BJS Datasheet(HTML) 1 Page - Exar Corporation |
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1 / 8 page ![]() MP7541B 1 Rev. 2.00 FEATURES • ESD Protection: 2000 V Minimum • Full Four Quadrant Multiplication • Low Glitch Energy • 12-Bit Linearity (End-Point) • Guaranteed Monotonic. All Grades. All Temperatures. • TTL/5 V CMOS Compatible • Stable, More Accurate Segmented Architecture – 2.0 ppm/ °C Typ. Gain Error Tempco – 0.2 ppm/ °C Max. Linearity Tempco – Lowest Sensitivity to Output Amplifier Offset • Latch-Up Free 15 V CMOS Multiplying 12-Bit Digital-to-Analog Converter APPLICATIONS • Industrial Automation • Automatic Test Equipment • Disk Drive Servo Systems • Digital/Synchro Conversion • Programmable Gain Amplifiers • Ratiometric A/D Conversion • Function Generation • Digitally Controlled Filters GENERAL DESCRIPTION The MP7541B is a pin-compatible replacement which offers superior performance in latch-up and ESD protection versus the comparable 7541 and 7541A. The high ESD protection will re- duce failures caused by mishandling. These devices are manu- factured using patented advanced thin film resistors on a double metal CMOS process which result in ultra stable thin film and su- perior long life reliability and stability. The MP7541B incorpo- rates a bit decoding technique yielding lower glitch, higher speed and excellent accuracy over temperature and time. The MP7541B’s outstanding features are: Stability: Both Integral Non-Linearity (INL) and Differential- Non-Linearity (DNL) are rated at 0.2 ppm/ °C maximum. Monotonicity is guaranteed over the entire temperature range. Gain Temperature Coefficient (TCGE) is 2.0 ppm/ °C typical. Lower Sensitivity to Output Amplifier Offset: Multiplying DACs provide an output current into a virtual ground of the out- put op amp. Additional linearity error caused by the op amp is reduced by a factor of 3 in the MP7541B versus conventional R-2R DACs. 3-7 Decoder 80k 40k Switch Drivers 40k 40k GND BIT 1 BIT 2 BIT 3 BIT 4 BIT 12 (LSB) (MSB) 10k 80k “1” “1” “1” “1” “1” SIMPLIFIED BLOCK DIAGRAM “1” VDD VREF RFB IOUT1 IOUT2 |
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