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ACPL-P346 Datasheet(PDF) 13 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-P346 Datasheet(HTML) 13 Page - AVAGO TECHNOLOGIES LIMITED |
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13 / 16 page ![]() 13 Application Information Product Overview Description The ACPL-P346/W346 is an optically isolated power output stage capable of driving power or SiC. Based on BCDMOS technology, this gate drive optocoupler deliv- ers higher peak output current, better rail-to-rail output voltage performance and two times faster speed than the previous generation products. The high peak output current and short propagation de- lay are needed for fast MOSFET switching to reduce dead time and improve system overall efficiency. Rail-to-rail output voltage ensures that the MOSFET’s gate voltage is driven to the optimum intended level with no power loss across the MOSFET. This helps the designer lower the sys- tem power which is suitable for bootstrap power supply operation. It has very high CMR(common mode rejection) rating which allows the microcontroller and the MOSFET to op- erate at very large common mode noise found in indus- trial motor drives and other power switching applications. The input is driven by direct LED current and has a hys- teresis that prevents output oscillation if insufficient LED driving current is applied. This will eliminates the need of additional Schmitt trigger circuit at the input LED. The stretched SO6 package which is up to 50% smaller than conventional DIP package facilitates smaller and more compact design. These stretched packages are com- pliant to many industrial safety standards such as IEC/EN/ DIN EN 60747-5-5, UL 1577 and CSA. Recommended Application Circuit The recommended application circuit shown in Figure 22 illustrates a typical gate drive implementation using the ACPL-P346. The supply bypass capacitors (1 µF) provide the large tran- sient currents necessary during a switching transition. Be- cause of the transient nature of the charging currents, a low current (4.0 mA) power supply will be enough to pow- er the device. The split resistors (in the ratio of 1.5:1) across the LED will provide a high CMR response by providing a balanced resistance network across the LED. The gate resistor RG serves to limit gate charge current and controls the MOSFET switching times. In PC board design, care should be taken to avoid routing the MOSFET drain or source traces close to the ACPL-P346 input as this can result in unwanted coupling of transient signals into ACPL-P346 and degrade performance. Figure 22. Recommended application circuit with split resistors LED. VCC +_ +_ Rg Q1 Q2 +HVDC -HVDC 1µF VCC =10V VEE 1 2 3 6 5 4 CATHODE NC ANODE VOUT 232Ω 154Ω |
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