TMS55165 datasheet(24/70 Pages) TI

24 / 70 page

TMS55165, TMS55166, TMS55175, TMS55176

262144 BY 16-BIT MULTIPORT VIDEO RAM

SMVS463 – DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

8-column block write (continued)

A block-write cycle is entered in a manner similar to a DRAM write cycle except DSF is held high on the falling

edge of CAS. As in a DRAM write operation, WEL and WEU enable the corresponding lower and upper DRAM

DQ bytes to be written, respectively. The column-mask data is input via the DQs and is latched on either the

falling edge of CAS or the first falling edge of WEx, whichever occurs later. The 16-bit color-data register must

be loaded prior to performing a block write as described below. Refer to the write-per-bit section for details on

use of the write-mask capability allowing additional performance options.

Example of block write:

block-write column address

110000000 (A0 – A8 from left to right)

bit 0

bit 15

color-data register =

10111011

11000111

write-mask register =

11101111

11111011

column-mask register =

11110000

01111010

Lower

Byte

Upper

Byte

Column-address bits A0 – A2 are ignored. Block 0 (columns 0 – 7) is selected for both bytes. The lower byte has

DQ0 – DQ2 and DQ4 – DQ7 written with bits 0 – 2 and 4 – 7 from the color-data register to columns 0 – 3. Columns

4 – 7 are not written and retain their previous data due to the column-mask bits 4 – 7 being 0. DQ3 is not written

and retains its previous data due to the write-mask bit 3 being 0.

The upper byte has DQ8 – DQ12 and DQ14 – DQ15 written with bits 8 – 12 and 14 – 15 from the color-data

column-mask bits 8, 13, and 15 being 0. DQ13 is not written and retains its previous data due to the

write-mask-register bit 13 being 0. If the previous data was all 0s, the upper byte would contain the data pattern

in Figure 15 after the 8–column block-write operation shown in the example.

DQ14

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ15

Upper Byte

0 1 1 1 1 0 1 0

0 0 0 0 0 0 0 0

0 1 1 1 1 0 1 0

0 1 2 3 4 5 6 7

Columns

Figure 15. Example of Upper Byte After 8-Column Block-Write Operation

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