device which are synchronously clocked by this signal All

time data and data-changed flag change on the falling edge

of the clock setting pulse

Data-Changed Flag

The data-changed flag is set by the clock setting pulse to

indicate that the time data has been altered since the clock

was last read This flag occupies bit 3 of the control register

where it can be tested by the processor to sense data-

changed It will be reset by a read of the control register

See the section ‘‘Methods of Device Operation’’ for sug-

gested clock reading techniques using this flag

Seconds Counters

There are three counters for seconds

a) tenths of seconds

b) units of seconds

c) tens of seconds

The registers are accessed at the addresses shown in Ta-

ble I The tenths of seconds register is reset to 0 when the

clock startstop bit (bit 2 of the control register) is set to

logic 1 The units and tens of seconds are set up by the

processor giving time setting to the nearest second All

three registers can be read by the processor for time output

Minutes Counters

There are two minutes counters

a) units of minutes

b) tens of minutes

Both registers may be read to or written from as required

Hours Counters

There are two hours counters

a) units of hours

b) tens of hours

Both counters may be accessed for read or write operations

as desired

In 12-hour mode the tens of hours register has only one

active bit and the top three bits are set to logic 0 Data bit 1

of the clock setting register is the AMPM indicator logic 0

indicating AM logic 1 for PM

When 24-hour mode is programmed the tens of hours reg-

ister reads out two bits of data and the two most significant

bits are set to logic 0 There is no AMPM indication and bit

1 of the clock setting register will read out a logic 0

In both 1224-hour modes the units of hours will read out

four active data bits 12 or 24-hour mode is selected by bit 0

of the clock setting register logic 0 for 12-hour mode logic

1 for the 24-hour mode

Days Counters

There are two days counters

a) units of days

b) tens of days

The days counters will count up to 28 29 30 or 31 depend-

ing on the state of the months counters and the leap year

counter The microprocessor has full readwrite access to

these registers

Months Counters

There are two months counters

a) units of months

b) tens of months

Both these counters have full readwrite access

Years Counters

There are two years counters

a) units of years

b) tens of years

Both these counters have full readwrite access The years

will count up to 99 and roll over to 00

TABLE I Address Decoding of Real-Time Clock Internal Registers

Register Selected

Address (Binary)

(Hex)

Access

AD3

AD2

AD1

AD0

0

Control Register

0

0

0

0

0

Split Read and Write

1

Tenths of Seconds

0

0

0

1

1

Read Only

2

Units Seconds

0

0

1

0

2

RW

3

Tens Seconds

0

0

1

1

3

RW

4

Units Minutes

0

1

0

0

4

RW

5

Tens Minutes

0

1

0

1

5

RW

6

Unit Hours

0

1

1

0

6

RW

7

Tens Hours

0

1

1

1

7

RW

8

Units Days

1

0

0

0

8

RW

9

Tens Days

1

0

0

1

9

RW

10

Units Months

1

0

1

0

A

RW

11

Tens Months

1

0

1

1

B

RW

12

Units Years

1

1

0

0

C

RW

13

Tens Years

1

1

0

1

D

RW

14

Day of Week

1

1

1

0

E

RW

15

Clock Setting

1

1

1

1

F

RW

Interrupt Registers

6