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INA212CIRSWR Datasheet(PDF) 16 Page - Texas Instruments |
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INA212CIRSWR Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 44 page ![]() Gain Error Factor = (1250 ´ INT R ) (1250 S ´ ´ ´ R ) + (1250 R ) + (R R ) INT S INT R SHUNT V REF V OUT V+ V CM R < 10 W S R INT R < 10 S W R INT Load C F Bias 16 INA210, INA211, INA212, INA213, INA214, INA215 SBOS437J – MAY 2008 – REVISED FEBRUARY 2017 www.ti.com Product Folder Links: INA210 INA211 INA212 INA213 INA214 INA215 Submit Documentation Feedback Copyright © 2008–2017, Texas Instruments Incorporated 7.4 Device Functional Modes 7.4.1 Input Filtering An obvious and straightforward filtering location is at the device output. However, this location negates the advantage of the low output impedance of the internal buffer. The only other filtering option is at the device input pins. This location, though, does require consideration of the ±30% tolerance of the internal resistances. Figure 24 shows a filter placed at the inputs pins. Figure 24. Filter at Input Pins The addition of external series resistance, however, creates an additional error in the measurement so the value of these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias network shown in Figure 24 present at the input pins creates a mismatch in input bias currents when a differential voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This mismatch creates a differential error voltage that subtracts from the voltage developed at the shunt resistor. This error results in a voltage at the device input pins that is different than the voltage developed across the shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on device operation. The amount of error these external filter resistors add to the measurement can be calculated using Equation 2 where the gain error factor is calculated using Equation 1. The amount of variance in the differential voltage present at the device input relative to the voltage developed at the shunt resistor is based both on the external series resistance value as well as the internal input resistors, R3 and R4 (or RINT as shown in Figure 24). The reduction of the shunt voltage reaching the device input pins appears as a gain error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to determine the amount of gain error that is introduced by the addition of external series resistance. The equation used to calculate the expected deviation from the shunt voltage to what is measured at the device input pins is given in Equation 1: where: • RINT is the internal input resistor (R3 and R4), and • RS is the external series resistance. (1) |
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