NSC800 datasheet(49/76 Pages) NSC

49 / 76 page

129 Rotate and Shift (Continued)

76543210

SRL (HL)

00111110

Timing

M cycles

T states

15 (4 4 4 3)

Addressing Mode

3210

SRL (IX a d) (for NX e 0)

11NX 11101

SRL (IY a d) (for NX e 1)

1011

1110

Timing

M cycles

T states

23 (4 4 3 5 4 3)

Addressing Mode

Indexed

REGISTERMEMORY

RLD

Rotate digit left and right between the Accumulator and

memory (HL)

TLC5171 – 71

S Set if result is negative

Z Set if result is zero

H Reset

PV Set if result parity is even

N Reset

C NA

76543210

11101101

01101111

Timing

M cycles

T states

18 (4 4 3 4 3)

Addressing Mode

ImpliedRegister Indirect

RRD

Rotate digit right and left between the Accumulator and

memory (HL)

TLC5171 – 72

S Set if result is negative

Z Set if result is zero

H Reset

PV Set if result parity is even

N Reset

C NA

76543210

11101101

01100111

Timing

M cycles

T states

18 (4 4 3 4 3)

Addressing Mode

ImpliedRegister Indirect

1210 Exchanges

REGISTERREGISTER

DE HL

Exchange the contents of the 16-bit register pairs DE and

No flags affected

76543210

11101011

Timing

M cycles

T states

Addressing Mode

AF A’F’

The contents of the Accumulator and flag register are ex-

changed with their corresponding alternate registers that is

A and F are exchanged with A’ and F’

A’

No flags affected

F’

76543210

00001000

Timing

M cycles

T states

Addressing Mode

NSC800 Datasheet(PDF) 49 Page - National Semiconductor (TI)

NSC800 Datasheet(HTML) 49 Page - National Semiconductor (TI)

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