PC87364-XXXSLASHVLA datasheet(107/180 Pages) NSC

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3.0 System Wake-Up Control (SWC) (Continued)

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3.4.30

Standby General-Purpose I/O (SBGPIO) Register Overview

The SWC can be used to operate up to 12 VSB-powered general-purpose input/output (GPIO), input (GPI) or output (GPO)

pins, eight of which support event detection. These are as follows:

GPIOE0-5 are GPIO pins.

GPIE6,7 and GPIS2,3 are GPI pins.

GPOS0,1 are GPO pins.

For programming convenience, these pins are associated with two SBGPIO ports. Specifically, GPIE0-5 and GPIE6,7 are

associated with bits 0 to 7 of SBGPIO port 0, respectively , and GPOS0,1 and GPIS2,3 are associated with bits 0 to 3 of

SBGPIO port 1, respectively.

Table 42 provides a summary of the SBGPIO pin-to-port assignment and pin types.

Table 42. SBGPIO Pin Types and Associated Port

An SBGPIO port is structured as an 8-bit port, based on eight pins. It features:

• Software capability to manipulate and read pin levels

• Controllable system notiﬁcation by several means based on the pin level or level transition

• Ability to capture and manipulate events and their associated status

• Back-drive protected pins.

SBGPIO port operation is associated with two sets of registers:

• Pin conﬁguration registers, mapped in the SWC register bank 3. These registers are used to statically set up the log-

ical behavior of each pin. There is one 8-bit register for each SBGPIO pin.

• Two 8-bit runtime registers: SBGPIO Data Out (SBGPDO) and SBGPIO Data In (SBGPDI). These registers are

mapped in the SWC device I/O space (determined by the base address registers in the SWC Device Conﬁguration).

They are used to manipulate and/or read the pin values. Each runtime register corresponds to the 8-pin port de-

scribed above (see Table 42).

Each SBGPIO pin is associated with up to six configuration bits and the corresponding bit slice of the two runtime registers,

as shown in Figure 10.

The SBGPIO port has basic as well as enhanced functionality. Basic functionality includes the manipulation and reading of

the SBGPIO pins, as described in Section . Enhanced functionality includes event detection, as described in

Event Detec-

tion.

Pin(s)

Port

Type

Event

Detection

GPIOE0-5

I/O

Yes

GPIE6,7

Yes

GPOS0,1

GPIS2,3

PC87364-XXX/VLA Datasheet(PDF) 107 Page - National Semiconductor (TI)

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