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TNETV2666FIBZWT Datasheet(PDF) 48 Page - Texas Instruments

Part # TNETV2666FIBZWT
Description  Fixed-Point Digital Signal Processor
PDF  249 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV2666FIBZWT Datasheet(HTML) 48 Page - Texas Instruments

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TMS320C6424
SPRS347D – MARCH 2007 – REVISED DECEMBER 2009
www.ti.com
Table 2-16. EMAC (MII/RMII) and MDIO Terminal Functions (continued)
SIGNAL
TYPE(1)
OTHER(2) (3)
DESCRIPTION
ZWT
ZDU
NAME
NO.
NO.
This pin is multiplexed between EMAC (RMII), EMIFA, and GPIO.
RMRXD1/EM_CS5/
IPD
F19
J22
I/O/Z
In Ethernet MAC (RMII) mode, it is EMAC receive data pin 1
GP[33]
DVDD33
(RMRXD1) [I].
This pin is multiplexed between EMAC (RMII), EMIFA, and GPIO.
RMRXD0/EM_CS4/
IPD
E19
H22
I/O/Z
In Ethernet MAC (RMII) mode, it is EMAC receive data pin 0
GP[32]
DVDD33
(RMRXD0) [I].
MDIO
This pin is multiplexed between HPI, MDIO, PCI, and GPIO.
HCS/MDCLK/
IPU
C1
D1
I/O/Z
In Ethernet MAC mode, it is Management Data Clock output
AD5/GP[81]
DVDD33
MDCLK.
HAS/MDIO/
IPU
This pin is multiplexed between HPI, MDIO, PCI, and GPIO.
D1
C1
I/O/Z
AD3/GP[83]
DVDD33
In Ethernet MAC mode, it is Management Data IO MDIO [I/O/Z].
48
Device Overview
Copyright © 2007–2009, Texas Instruments Incorporated
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Product Folder Link(s): TMS320C6424



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