STM32L151XE datasheet(133/134 Pages) STMICROELECTRONICS

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STM32L151xE STM32L152xE

Revision History

133

10-Feb-2015

Updated Section : In order to meet environmental requirements, ST

offers these devices in different grades of ECOPACK® packages,

depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at:

www.st.com. ECOPACK® is an ST trademark. with new package

device marking.

Updated Figure 8: Memory map.

27-Apr-2015

Updated Section 7: Package information structure: Paragraph titles

and paragraph heading level.

Updated Section 7.1: LQFP144, 20 x 20 mm, 144-pin low-profile quad

flat package information removing gate mark in Figure 33 and adding

text for device orientation versus pin1 identifier.

Updated Section 7.2: LQFP100, 14 x 14 mm, 100-pin low-profile quad

flat package information removing gate mark in Figure 36 and adding

note for device orientation versus pin 1 identifier.

Updated Section 7: Package information for all other package device

marking adding text in for device orientation versus pin 1 or ball A1

identifier.

Added Figure 44: WLCSP104, 0.4 mm pitch wafer level chip scale

package recommended footprint and Table 70: WLCSP104, 0.4 mm

pitch recommended PCB design rules.

Updated Table 8: STM32L151xE and STM32L152xE pin definitions

ADC inputs.

Updated Table 16: Embedded internal reference voltage temperature

coefficient at 100ppm/°C.

and table footnote 3: “guaranteed by design” changed by “guaranteed

by characterization results”.

Updated Table 63: Comparator 2 characteristics new maximum

threshold voltage temperature coefficient at 100ppm/°C.

09-Feb-2016

Updated cover page putting eight SPIs in the peripheral

communication interface list.

Updated Table 2: Ultra-low-power STM32L151xE and STM32L152xE

device features and peripheral counts SPI and I2S lines.

Updated Table 39: ESD absolute maximum ratings CDM class II by

class C3 and C4 depending of the package.

Updated all the notes, removing ‘not tested in production’.

Updated Table 10: Voltage characteristics adding note about VREF-

pin.

Updated Table 5: Functionalities depending on the working mode (from

Run/active down to standby) LSI and LSE functionalities putting “Y” in

Standby mode.

Table 73. Document revision history (continued)

Date

Revision

Changes

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