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STM32F732ICY6 Datasheet(PDF) 15 Page - STMicroelectronics |
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STM32F732ICY6 Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 122 page ![]() DocID028480 Rev 1 15/122 STM32F732xx STM32F733xx Description 44 Figure 5. STM32F732xx and STM32F733xx block diagram 1. The timers connected to APB2 are clocked from TIMxCLK up to 216 MHz, while the timers connected to APB1 are clocked from TIMxCLK either up to 108 MHz or 216 MHz depending on TIMPRE bit configuration in the RCC_DCKCFGR register. |
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