STM32F732ICT7 datasheet(41/122 Pages) STMICROELECTRONICS

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STM32F732xx STM32F733xx

Functional overview

•

Internal FS OTG PHY support

•

For the STM32F732xx devices: External HS or HS OTG operation supporting ULPI in

SDR mode. The OTG PHY is connected to the microcontroller ULPI port through 12

signals. It can be clocked using the 60 MHz output.

•

For the STM32F733xx devices: Internal HS OTG PHY support.

•

Internal USB DMA

•

HNP/SNP/IP inside (no need for any external resistor)

•

For OTG/Host modes, a power switch is needed in case bus-powered devices are

connected

2.30.1

Universal Serial Bus controller on-the-go High-Speed PHY controller

(USBPHYC) only on STM32F733xx devices.

The USB HS PHY controller:

–

Sets the PHYPLL1/2 values for the PHY HS

–

Sets the other controls on the PHY HS

–

Controls and monitors the USB PHY’s LDO

2.31

Random number generator (RNG)

All the devices embed an RNG that delivers 32-bit random numbers generated by an

integrated analog circuit.

2.32

Advanced encryption standard hardware accelerator (AES)

The devices embed an AES hardware accelerator which can be used to both encipher and

decipher data using AES algorithm.

STM32F732ICT7 Datasheet(PDF) 41 Page - STMicroelectronics