Confidential

Datasheet Version 1.1

Mar. 2015. Revision 1.1

MagnaChip Semiconductor Ltd.

12

NO.

CODE

HEX

VPOS

VNEG

BIT4

BIT3

BIT2

BIT1

BIT0

12

0

1

0

1

1

0Bh

5.1V

-5.1V

13

0

1

1

0

0

0Ch

5.2V

-5.2V

14

0

1

1

0

1

0Dh

5.3V

-5.3V

15

0

1

1

1

0

0Eh

5.4V

-5.4V

16

0

1

1

1

1

0Fh

5.5V

-5.5V

17

1

0

0

0

0

10h

5.6V

-5.6V

18

1

0

0

0

1

11h

5.7V

-5.7V

I

I

Data transmission from the main uP to MAP7102 and vice versa takes place through the I

consisting of the two lines SDA and SCL (pull-up resistors to a positive supply voltage must be externally

connected)

INTERFACE PROTOCOL

The interface protocol is composed of five commands below table.

Table 3. I

Command

Type

Description

State

START

Condition

A start condition

SCL=1, SDA 1 to 0

STOP

Condition

A stop condition

SCL=1, SDA 0 to 1

DEVICE ADDR + W/R

Byte

A device address and W/R

Write=0 / Read=1

ADDR

Byte

A Register address byte

-

DATA

Byte

A Data byte

-

The Register address byte determines the first register in which the read or write operation takes places.

When the read or write operation is finished, the register address is automatically incremented.

Table 4. I2C Packet format

START

7

6

5

4

3

2

1

0

ACK

7

6

5

4

3

2

1

0

ACK

7

6

5

4

3

2

1

0

ACK

STOP

DEVICE ADDRESS (7Bit)

R/W

REGISTER ADDRESS (8Bit)

DATA (Bit)

START AND STOP CONDITIONS

Both Data and Clock lines remain HIGH when the bus is not busy. As shown in below figure, a start

condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to

HIGH transition of the SDA line while SCL is HIGH. A STOP condition must be sent before each START

condition.