AS4C64M16D2 datasheet(32/58 Pages) ALSC

32 / 58 page

AS4C64M16D2

Alliance Memory Inc. reserves the right to change products or specification without notice.

Rev. 1.1

April. /2012

NOTE 37: tQH = tHP – tQHS, where: tHP is the minimum of the absolute half period of the actual input clock; and tQHS is the

specification value under the max column. {The less half-pulse width distortion present, the larger the tQH value is;

and the larger the valid data eye will be.}

NOTE 38: When the device is operated with input clock jitter, this parameter needs to be derated by the actual tERR(6-

10per) of the input clock. (output deratings are relative to the SDRAM input clock.)

NOTE 39: When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(per)

of the input clock. (output deratings are relative to the SDRAM input clock.)

NOTE 40: When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(duty)

of the input clock. (output deratings are relative to the SDRAM input clock.)

NOTE 41: When the device is operated with input clock jitter, this parameter needs to be derated by { - tJIT(duty),max -

tERR(6-10per),max } and { - tJIT(duty),min - tERR(6-10per),min } of the actual input clock. (output deratings are relative to

the SDRAM input clock.)

NOTE 42: For tAOFD of DDR2-800/1066, the 1/2 clock of tCK in the 2.5 x tCK assumes a tCH(avg), average input clock HIGH pulse

width of 0.5 relative to tCK(avg). tAOF,min and tAOF,max should each be derated by the same amount as the actual

amount of tCH(avg) offset present at the DRAM input with respect to 0.5.

NOTE 43: If refresh timing is violated, data corruption may occur and the data must be re-writtern with valid data before a

valid READ can be executed

Timing Waveforms

Figure 7. Initialization sequence after power-up

AS4C64M16D2 Datasheet(PDF) 32 Page - Alliance Semiconductor Corporation