AS8C401800 datasheet(7/17 Pages) ALSC

7 / 17 page

6.42

AS8C403600, AS8C401800, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with

3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect

Commercial Temperature Range

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range(1)

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range(VDD = 3.3V ± 5%)

Figure 2. Lumped Capacitive Load, Typical Derating

Figure 1. AC Test Load

AC Test Load

AC Test Conditions

(VDDQ = 3.3V)

NOTE:

1. The LBO, TMS, TDI, TCK and TRST pins will be internally pulled to V DD and the ZZ pin will be internally pulled to V SS if they are not actively driven in the application.

NOTES:

1. All values are maximum guaranteed values.

2. At f = f MAX, inputs are cycling at the maximum frequency of read cycles of 1/ Tcyc while ADSC = LOW; f=0 means no input lines are changing.

3. For I/Os V HD = V DDQ - 0.2V, V LD = 0.2V. For other inputs V HD = V DD - 0.2V, V LD = 0.2V.

VDDQ/2

I/O

Z0 =50

5279 drw 06 ,

20 30 50

100

200

ΔtCD

(Typical, ns)

Capacitance (pF)

5279 drw 07

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

|ILI|

Input Leakage Current

VDD = Max., VIN = 0V to VDD

___

5µA

|ILZZ|

ZZ, LBO and J TAG Input Le akage Current(1)

VDD = Max., VIN = 0V to VDD

___

µA

|ILO|

Output Leakage Current

VOUT = 0V to VDDQ, Device Deselected

___

5µA

VOL

Output Low Voltage

IOL = +8mA, VDD = Min.

___

0.4

VOH

Output High Voltage

IOH = -8mA, VDD = Min.

2.4

___

5279 tbl 08

Symbol

Parameter

Test Conditions

150MHz

133MHz

Unit

Com'l

Ind

Com'l

Ind

IDD

Operating Power Supply

Current

Device Selected, Outputs Open, VDD = Max.,

VDDQ = Max., VIN > VIH or < VIL, f = fMAX(2)

295

305

250

260

ISB1

CMOS Standby Power

Supply Current

Device Deselected, Outputs Open, VDD = Max.,

VDDQ = Max., VIN > VHD or < VLD, f = 0(2,3)

ISB2

Clock Running Power

Supply Current

Device Deselected, Outputs Open, VDD = Max.,

VDDQ = Max., VIN > VHD or < VLD, f = fMAX(2,3)

105

115

100

110

IZZ

Full Sleep Mode Supply

Current

ZZ> VHD, VDD = Max.

5279 tbl 09

InputP ulse Levels

InputRise/Fall Times

InputTiming Reference Levels

Output Timing Reference Levels

AC Test Load

0 to 3V

2ns

1.5V

See Figure 1

5279 tbl 10

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