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M74HC573 Datasheet(PDF) 1 Page - STMicroelectronics

Part # M74HC573
Description  OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
PDF  12 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M74HC573 Datasheet(HTML) 1 Page - STMicroelectronics

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July 2001
s
HIGH SPEED:
tPD = 13ns (TYP.) at VCC = 6V
s
LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 573
DESCRIPTION
The M74HC573 is an high speed CMOS OCTAL
LATCH WITH 3-STATE OUTPUTS fabricated
with silicon gate C2MOS technology.
This 8-BIT D-Type latches is controlled by a latch
enable input (LE) and output enable input (OE).
While the LE input is held at a high level, the Q
outputs will follow the data input precisely. When
LE is taken low, the Q outputs will be latched
precisely at the logic level of D input data.
While the OE input is at low level, the eight outputs
will be in a normal logic state (high or low logic
level) and while is at high level the outputs will be
in a high impedance state.
The 3-State output configuration and the wide
choice of outline make bus organized system
simple.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC573
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC573B1R
SOP
M74HC573M1R
M74HC573RM13TR
TSSOP
M74HC573TTR
TSSOP
DIP
SOP


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