HT45FM30 datasheet(39/188 Pages) HOLTEK

39 / 188 page

Rev. 1.20

De�e��e� 1�� 201�

Rev. 1.20

De�e��e� 1�� 201�

HT45FM30

Brushless DC Motor Flash MCU

SLOW Mode to NORMAL Mode Switching

InSLOWModethesystemusestheLIRClowspeedsystemoscillator.Toswitchbacktothe

NORMALMode,wherethehighspeedsystemoscillatorisused,theHLCLKbitshouldbesetto

“1”orHLCLKbitis“0”,butCKS2~CKS0issetto“010”,“011”,“100”,“101”,“110”or“111”.

Asacertainamountoftimewillberequiredforthehighfrequencyclocktostabilise,thestatusof

theHTObitischecked.Theamountoftimerequiredforhighspeedsystemoscillatorstabilization

dependsuponwhichhighspeedsystemoscillatortypeisused.

Entering the SLEEP Mode

ThereisonlyonewayforthedevicetoentertheSLEEPModeandthatistoexecutethe"HALT".

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto"0"andthe

WDTorLVDon.Whenthisinstructionisexecutedundertheconditionsdescribedabove,the

followingwilloccur:

• ThesystemclockandTimeBaseclockwillbestoppedandtheapplicationprogramwillstopat

the"HALT"instruction,buttheWDTorLVDwillremainwiththeclocksourcecomingfromthe

fSUBclock.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecountingiftheWDTclocksourceisselectedtocomefrom

thefSUBclockastheWDTisenabled.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

Entering the IDLE0 Mode

ThereisonlyonewayforthedevicetoentertheIDLE0Modeandthatistoexecutethe“HALT”

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“1”andthe

FSYSONbitinWDTCregisterequalto“0”.Whenthisinstructionisexecutedundertheconditions

describedabove,thefollowingwilloccur:

• Thesystemclockwillbestoppedandtheapplicationprogramwillstopatthe“HALT”instruction,

buttheTimeBaseclockandfSUBclockwillbeon.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecountingiftheWDTclocksourceisselectedtocomefrom

thefSUBclockandtheWDTisenabled.TheWDTwillstopifitsclocksourceoriginatesfromthe

systemclock.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

Entering the IDLE1 Mode

ThereisonlyonewayforthedevicetoentertheIDLE1Modeandthatistoexecutethe“HALT”

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“1”andthe

FSYSONbitinWDTCregisterequalto“1”.Whenthisinstructionisexecutedundertheconditions

describedabove,thefollowingwilloccur:

• ThesystemclockandTimeBaseclockandfSUBclockwillbeonandtheapplicationprogramwill

stopatthe“HALT”instruction.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecountingiftheWDTisenabledregardlessoftheWDT

clocksourcewhichoriginatesfromthefSUBclockorfromthesystemclock.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

HT45FM30 Datasheet(PDF) 39 Page - Holtek Semiconductor Inc

HT45FM30 Datasheet(HTML) 39 Page - Holtek Semiconductor Inc

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