R5F104FED datasheet(34/213 Pages) RENESAS

34 / 213 page

RL78/G14

1. OUTLINE

R01DS0053EJ0330 Rev. 3.30

Page 34 of 208

Aug 12, 2016

1.6

Outline of Functions

[30-pin, 32-pin, 36-pin, 40-pin products (code flash memory 16 KB to 64 KB)]

Caution

This outline describes the functions at the time when Peripheral I/O redirection register 0, 1

(PIOR0, 1) are set to 00H.

(1/2)

(Note is listed on the next page.)

Item

30-pin

32-pin

36-pin

40-pin

R5F104Ax

(x = A, C to E)

R5F104Bx

(x = A, C to E)

R5F104Cx

(x = A, C to E)

R5F104Ex

(x = A, C to E)

Code flash memory (KB)

16 to 64

Data flash memory (KB)

4444

RAM (KB)

2.5 to 5.5 Note

Address space

1 MB

Main system

clock

High-speed system

clock

X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)

HS (high-speed main) mode: 1 to 20 MHz (VDD = 2.7 to 5.5 V),

HS (high-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (low-speed main) mode:

1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)

High-speed on-chip

oscillator clock (fIH)

HS (high-speed main) mode: 1 to 32 MHz (VDD = 2.7 to 5.5 V),

HS (high-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)

Subsystem clock

—

XT1 (crystal) oscillation,

external subsystem

clock input (EXCLKS)

32.768 kHz

Low-speed on-chip oscillator clock

15 kHz (TYP.): VDD = 1.6 to 5.5 V

General-purpose register

8 bits

× 32 registers (8 bits × 8 registers × 4 banks)

Minimum instruction execution time

0.03125

μs (High-speed on-chip oscillator clock: fIH = 32 MHz operation)

0.05

μs (High-speed system clock: fMX = 20 MHz operation)

—

30.5

μs (Subsystem

clock: fSUB = 32.768 kHz

operation)

Instruction set

• Data transfer (8/16 bits)

• Adder and subtractor/logical operation (8/16 bits)

• Multiplication (8 bits

× 8 bits, 16 bits × 16 bits), Division (16 bits ÷ 16 bits, 32 bits ÷ 32 bits)

• Multiplication and Accumulation (16 bits

× 16 bits + 32 bits)

• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.

I/O port

Total

CMOS I/O

CMOS input

3335

CMOS output

————

N-ch open-drain I/O (6

V tolerance)

2333

Timer

16-bit timer

8 channels

(TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels, Timer RG: 1 channel)

Watchdog timer

1 channel

Real-time clock (RTC)

1 channel

12-bit interval timer

1 channel

Timer output

Timer outputs: 13 channels

PWM outputs: 9 channels

RTC output

—

•1 Hz

(subsystem clock: fSUB

= 32.768 kHz)

R5F104FED Datasheet(PDF) 34 Page - Renesas Technology Corp

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