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S124 Datasheet(PDF) 46 Page - Renesas Technology Corp

Part # S124
Description  32-bit ARM Cortex-M0 microcontroller
PDF  98 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

S124 Datasheet(HTML) 46 Page - Renesas Technology Corp

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R01DS0264EU0100 Rev.1.00
Page 46 of 95
Feb 23, 2016
S124
2. Electrical Characteristics
Note 1. The division ratio of ICLK and PCLKx is 1. The recovery time is determined by the system clock source.
Note 2. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h.
Note 3. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h.
Note 1. The division ratio of ICLK and PCLKx is 1. The recovery time is determined by the system clock source.
Note 2. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h.
Note 3. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h.
Note 1. The sub-clock oscillator or LOCO itself continues oscillating in Software Standby mode during Subosc-speed
mode.
Table 2.25
Timing of recovery from low power modes (3)
Item
Symbol Min
Typ
Max
Unit
Test
conditions
Recovery time
from Software
Standby mode*1
Low-speed
mode
Crystal
resonator
connected to
main clock
oscillator
System clock source is
main clock oscillator
(1 MHz)*2
tSBYMC
-
23
ms
Figure 2.25
External clock
input to main
clock oscillator
System clock source is
main clock oscillator
(1 MHz)*3
tSBYEX
-
28
50
μs
System clock source is MOCO (1 MHz)
tSBYMO
-
25
35
μs
Table 2.26
Timing of recovery from low power modes (4)
Item
Symbol Min
Typ
Max
Unit
Test
conditions
Recovery time
from Software
Standby mode*1
Low-voltage
mode
Crystal
resonator
connected to
main clock
oscillator
System clock source is
main clock oscillator
(4 MHz)*2
tSBYMC
-
23
ms
Figure 2.25
External clock
input to main
clock oscillator
System clock source is
main clock oscillator
(4 MHz)*3
tSBYEX
-
108
130
μs
System clock source is HOCO (4 MHz)
tSBYHO
-
108
130
μs
Table 2.27
Timing of recovery from low power modes (5)
Item
Symbol Min
Typ
Max
Unit
Test
conditions
Recovery time
from Software
Standby mode*1
SubOSC-speed mode
System clock source is sub-clock
oscillator (32.768 kHz)
tSBYSC
-0.85
1
ms
Figure 2.25
System clock source is LOCO
(32.768 kHz)
tSBYLO
-
0.85
1.2
ms



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