RT9624BZSP datasheet(13/16 Pages) RICHTEK

13 / 16 page

RT9624B

DS9624B-07

July 2015

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Layout Consideration

Figure 6 shows the schematic circuit of a synchronous

buck converter to implement the RT9624B. The converter

operates from 5V to 12V of input Voltage.

For the PCB layout, it should be very careful. The power

circuit section is the most critical one. If not configured

properly, it will generate a large amount of EMI. The location

of Q1, Q2, L1 should be very close.

Next, the trace from UGATE, and LGATE should also be

short to decrease the noise of the driver output signals.

PHASE signals from the junction of the power MOSFET,

carrying the large gate drive current pulses, should be as

heavy as the gate drive trace. The bypass capacitor C1

should be connected to GND directly. Furthermore, the

bootstrap capacitors (CBOOT) should always be placed as

close to the pins of the IC as possible.

Figure 6. Synchronous Buck Converter Circuit

Figure 5. Derating Curve of Maximum Power Dissipation

For recommended operating condition specifications, the

maximum junction temperature is 125

°C. The junction to

ambient thermal resistance,

θJA, is layout dependent. For

SOP-8 package, the thermal resistance,

θJA, is 120°C/W

on a standard JEDEC 51-7 four-layer thermal test board.

For SOP-8 (Exposed Pad) package, the thermal

resistance,

θJA, is 75°C/W on a standard JEDEC 51-7

four-layer thermal test board. For WDFN-8L 3x3 package,

the thermal resistance,

θJA, is 31°C/W on a standard

JEDEC 51-7 four-layer thermal test board. The maximum

power dissipation at TA = 25

°C can be calculated by the

following formulas :

PD(MAX) = (125

°C − 25°C) / (120°C/W) = 0.833W for

SOP-8 package

PD(MAX) = (125

°C − 25°C) / (75°C/W) = 1.333W for

SOP-8 (Exposed Pad) package

PD(MAX) = (125

°C − 25°C) / (31°C/W) = 3.22W for

WDFN-8L 3x3 package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance,

θJA. The derating curve in Figure 5 allow the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

BOOT

UGATE

PHASE

LGATE

VCC

GND

CBOOT

12V

VIN

VCORE

PHB83N03LT

PHB95N03LT

12V

PWM

0.0

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

100

125

Ambient Temperature (°C)

Four-Layer PCB

SOP-8

SOP-8 (Exposed Pad)

WDFN-8L 3x3

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