SGP34119 datasheet(4/9 Pages) SECOS

4 / 9 page

Elektronische Bauelemente

SGP34119

Low Power Audio Amplifier

17-Dec-2009 Rev. A

Page 4 of 9

DESIGN GUIDELINES

GENERAL

The SGPC34119 is a low power audio amplifier capable of low voltage operation (VCC = 2.0 V minimum) such as that

encountered in line-powered speakerphones. The circuit provides a differential output (VO1-VO2) to the speaker to

maximize the available voltage swing at low voltages. The differential gain is set by two external resistors. Pins FC1 and

FC2 allow controlling the amount of power supply and noise rejection, as well as providing alternate inputs to the

amplifiers. The CD pin permits powering down the IC for muting purposes and to conserve power.

AMPLIFIERS

Referring to the block diagram, the internal configuration consists of two identical operational amplifiers. Amplifier # 1

has an open loop gain of≧80 dB (at f 100 Hz), and the closed loop gain is set by external resistor Rf and Ri. The

amplifier is unity gain stable, and has a unity gain frequency of approximately 1.5 MHz. In order to adequately cover the

telephone voice band (300 Hz to 3400 Hz), a maximum closed loop gain of 46 is recommended. Amplifier #2 is

internally set to a gain of-1.0(0dB).

The outputs of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. The outputs can

typically swing to within

≅ 0.4 V above ground, and to with≅1.3 V below V

CC, at the maximum current. See Figures 17

and 18 for VOH and VOL curves.

The output dc offset voltage (VO1-VO2) is primarily a function of the feedback resistor (Rf), and secondarily due to the

amplifiers' input offset voltages. The input offset voltage of the two amplifiers swill generally be similar for a particular IC,

and therefore nearly cancel each other at the outputs. Amplifier #1's bias current, however, flows out of VIN (Pin 4) and

through Rf, forcing V01 to shift negative by an amount equal to [Rf x IIB]. VO2 is shifted positive an equal amount. The

output offset voltage, specified in the Electrical Characteristics, is measured with the feedback resistor shown in the

Typical Application Circuit, and therefore takes into account the bias current as well as internal offset voltages of the

amplifiers. The bias current is constant with respect to VCC.

FC1 and FC2

Power supply rejection is provided by the capacitors (C1 and C2 in the Typical Application Circuit) at FC1 and FC2.

C2 is somewhat dominant at low frequencies, while C1 is dominant at high frequencies, as shown in the graphs of

Figures 4 to 7. The required values of C1 and C2 depend on the conditions of each application. A line powered

speakerphone, for example, will require more filtering than a circuit powered by a well regulated power supply. The

amount of rejection is a function of the capacitors, and the equivalent impedance looking into FC1 and FC2 (listed in the

Electrical Characteristics as RFC1 and RFC2).

In addition to providing filtering, C1 and C2 also affect the turn-on time of the circuit at power-up, since the two

capacitors must charge up through the internal 50 k

and 125 k

resistors. The graph of Figure 1 indicates the turn-on

time upon application of VCC of + 6.0 V. The turn-on time is

≅60% longer for V

CC = 3.0 V, and

≅20% less for V

CC = 9.0V.

Turn-off time is < 10

µs upon removal of V

CC.

CHIP DISABLE

The Chip Disable (Pin 1) can be used to power down the IC to conserve power, or for muting, or both. When at a

Logic "0" (0 V to 0.8 V), the SGP34119 is enabled for normal operation. When Pin 1 is at a Logic "1" (2.0 V to VCC V), the

IC is disabled. If Pin 1 is open, that is equivalent to a Logic "0", although good design practice dictates that an input

should never be left open. Input impedance at Pin 1 is a nominal 90 k . The power supply current (when disabled) is

shown in Figure 19.

Muting, defined as the change in differential gain from normal operation to muted operation, is in excess of 70 dB.

The turn-off time of the audio output, from the application of the CD signal, is <2.0

µs, and turn on-time is 12 ms-15 ms.

Both times are independent of C1,C2, and VCC.

When the SGP34119 is disabled, the voltages at FC1 and FC2 do not change as they are powered from VCC. The

outputs, VO1 and VO2, change to a high impedance condition, removing the signal from the speaker. If signals from other

sources are to be applied to the outputs (while disabled), they must be within the range of VCC and Ground.

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