CS61884 datasheet(36/72 Pages) CIRRUS

36 / 72 page

CS61884

DS485PP4

14.7 LOS Interrupt Enable Register (06h)

14.8 DFM Interrupt Enable Register (07h)

14.9 LOS Interrupt Status Register (08h)

14.10 DFM Interrupt Status Register (09h)

14.11 Software Reset Register (0Ah)

14.12 Performance Monitor Register (0Bh)

BIT

NAME

Description

[7:0]

LOSE 7-0

Any change in a LOS Status Register bits will cause the INT pin to go low if corresponding bit

in this register is set to “1”. Register bits default to 00h after power-up or reset.

BIT

NAME

Description

[7:0]

DFME 7-0

Enables interrupts for failures detected by the DFM. Any change in a DFM Status Register bit

will cause an interrupt if the corresponding bit is set to “1” in this register. Register bits

default to 00h after power-up or reset.

BIT

NAME

Description

[7:0]

LOSI 7-0

Bit n of this register is set to “1” to indicate a status change in bit n of the LOS Status Regis-

ter. The bits in this register indicate a change in status since the last cleared LOS interrupt.

BIT

NAME

Description

[7:0]

DFMI 7-0

Bit n of this register is set to “1” to indicate a status change in bit n of the DFM Status Regis-

ter. The bits in this register indicate a change in status since the last cleared DFM interrupt.

BIT

NAME

Description

[7:0]

SRES 7-0 Writing to this register initializes all registers to their default settings. Register bits default to

00h after power-up or reset.

BIT

NAME

Description

[7:4]

RSVD 7-4

RESERVED (These bits must be set to 0.)

CS61884 Datasheet(PDF) 36 Page - Cirrus Logic

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