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LM98503 Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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LM98503 Datasheet(HTML) 8 Page - National Semiconductor (TI) |
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8 / 25 page ![]() www.national.com 8 Analog to Digital Converter Specifications The following specifications apply for DV+ = AV+ = DV+ I/O = +3.0V, CL = 10pF, and fCLK = 18 MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25 oC (Note 7) AC Electrical Characteristics The following specifications apply for DV+ = AV+ = DV+ I/O = +3.0V, CL = 10pF, and fCLK = 18 MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25 oC (Note 7) Full Channel Performance Specifications The following specifications apply for AV+ = DV+ = DV+ I/O = 3.0V, CL = 10pF, and fCLK = 18MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25 oC (Note 7) * Note: 20 log10 (VIN / RMS Output Noise) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate con- ditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified. Note 3: When the voltage at any pin exceeds the power supplies (VIN < GND or VIN > AV+ or DV+), the current at that pin should be limited to 35mA. The 50mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25mA to two. Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units RREF Reference Ladder Resistance 1000 k Ω VREFT Top of Reference Ladder VREFT not driven externally. 2.25 V VREFB Bottom of Reference Ladder VREFB not driven externally. 0.75 V VREFT - VREFB Differential Reference Voltage VREFT and VREFB not driven externally. 1.5 V Overrange Output Code V IN > VREFT 1023 Underrange Output Code V IN < VREFB 0 Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units fCLK Input Clock Frequency 1 18 20 MHz TCLK Input Clock Period 50 55 1000 ns tch Clock High Time @ CLKmax 27.5 ns tcl Clock Low Time @ CLKmax 22.5 ns Clock Duty Cycle @ CLKmax 45/55 min/max trc, tfc Clock Input Rise and Fall Time 5 ns Pipeline Delay (Latency) 7 TCLK tVALID Data valid time 40 ns tOH Output Data Hold Time 27 33 ns tOD Output Delay Time 20 ns Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units DNL Differential Non-Linearity ±0.5 LSB INL Integral Non-Linearity +3.0/-1.5 LSB |
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