MP8775AS datasheet(4/8 Pages) EXAR

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CLK

PIPELINE DELAY

N + 1

N + 2

Sample “N”

t HL

t DL

N -- 3

N -- 2

N -- 1

DATA N

DATA

1/FS

tPWH

tPWL

Figure 1. MP8775 Timing Diagram

MP8775

Rev. 3.01

ELECTRICAL CHARACTERISTICS TABLE (CONT’D)

Description

Symbol

Min

Typ

Max

Units

Conditions

AC PARAMETERS

Differential Gain Error

FS = 4 x NTSC

Differential Phase Error

dPH

FS = 4 x NTSC

POWER SUPPLIES

Operating Voltage (AVDD, DVDD)9

VDD

Current (AVDD + DVDD)

IDD

Does not include ref. current

°C

Notes:

Tester measures code transitions by dithering the voltage of the analog input (VIN). The difference between the measured and the

ideal code width (VREF/256) is the DNL error (Figure 2.). The INL error is the maximum distance (in LSBs) from the best fit line to

any transition voltage (Figure 3.). Accuracy is a function of the sampling rate (FS).

Guaranteed. Not tested.

Specified values guarantee functionality. Refer to other parameters for accuracy.

--1 dB bandwidth is a measure of performance of the A/D input stage (S/H + amplifier). Refer to other parameters for accuracy within

the specified bandwidth.

See VIN input equivalent circuit (Figure 4.). Switched capacitor analog input requires driver with low output resistance.

All inputs have diodes to DVDD and DGND. Input DC currents will not exceed specified limits for any input voltage between

DGND and DVDD.

tR, tF should be limited to >5 ns for best results.

Depends on the RC load connected to the output pin.

AGND and DGND pins are connected through the silicon substrate. Connect together at the package and to the analog ground plane.

Specifications are subject to change without notice

ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)1, 2, 3

VDD to GND

7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

VRT & VRB

VDD +0.5 to GND --0.5 V

. . . . . . . . . . . . . . . . . . . .

VIN

VDD +0.5 to GND --0.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . .

All Inputs

VDD +0.5 to GND --0.5 V

. . . . . . . . . . . . . . . . . . . . .

All Outputs

VDD +0.5 to GND --0.5 V

. . . . . . . . . . . . . . . . . . .

Storage Temperature

--65 to +150°C

. . . . . . . . . . . . . . . . . . .

Lead Temperature (Soldering 10 seconds)

+300°C

. . . . . . .

Package Power Dissipation Rating @ 75°C

SOIC, SSOP, PDIP

700 mW

. . . . . . . . . . . . . . . . . . . . . . .

Derates above 75°C

9 mW/°C

. . . . . . . . . . . . . . . . . . . . . .

Notes:

Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a

stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating

conditions for extended periods may affect device reliability.

Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps

(HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short

transients outside the supplies of less than 100mA for less than 100ms.

VDD refers to AVDD and DVDD. GND refers to AGND and DGND.

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