CDC329

1-LINE TO 6-LINE CLOCK DRIVER

WITH SELECTABLE POLARITY

SCBS117A–D4501, JANUARY 1991–REVISED NOVEMBER 1992

4

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT FOR OUTPUTS

500

Ω

tPLH

tPHL

1.5 V

1.5 V

3 V

0 V

50% VCC

50% VCC

VOH

VOL

80% VCC

20% VCC

20% VCC

tf

tr

Input

(see Note B)

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

Output

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

Figure 1. Load Circuit and Voltage Waveforms