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HD6473048 Datasheet(PDF) 42 Page - Hitachi Semiconductor

Part #	HD6473048

Description	Hitachi Single-Chip Microcomputer

PDF	867 Pages

Scroll/Zoom	100%

Manufacturer	HITACHI [Hitachi Semiconductor]

Direct Link	http://www.renesas.com/eng

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2.6.2 Instructions and Addressing Modes

Table 2-2 indicates the instructions available in the H8/300H CPU.

Table 2-2 Instructions and Addressing Modes

Addressing Modes

@@

@

@

(d:16, (d:24, @ERn+/ @

@

@

(d:8,

(d:16, @@

Function

Instruction

#xx

Rn

@ERn ERn)

ERn)

@–ERn aa:8

aa:16

aa:24 PC)

PC)

aa:8

—

MOV

BWL BWL BWL

BWL

BWL

BWL

B

BWL

BWL

—

—

—

—

POP, PUSH

—

—

—

—

—

—

—

—

—

—

—

—

WL

MOVFPE,

—

—

—

—

—

—

—

B

—

—

—

—

—

MOVTPE

ADD, CMP

BWL BWL —

—

—

—

—

—

—

—

—

—

—

SUB

WL

BWL —

—

—

—

—

—

—

—

—

—

—

ADDX, SUBX B

B

—

—

—

—

—

—

—

—

—

—

—

ADDS, SUBS —

L

—

—

—

—

—

—

—

—

—

—

—

INC, DEC

—

BWL —

—

—

—

—

—

—

—

—

—

—

DAA, DAS

—

B

—

—

—

—

—

—

—

—

—

—

—

MULXU,

—

BW

—

—

—

—

—

—

—

—

—

—

—

MULXS,

DIVXU,

DIVXS

NEG

—

BWL —

—

—

—

—

—

—

—

—

—

—

EXTU, EXTS

—

WL

—

—

—

—

—

—

—

—

—

—

—

Logic

AND, OR,

BWL BWL —

—

—

—

—

—

—

—

—

—

—

operations XOR

NOT

—

BWL —

—

——

—

—

—

———

—

Shift instructions

—

BWL —

—

—

—

—

—

—

—

—

—

—

Bit manipulation

—

B

B

—

—

—

B

—

—

—

—

—

—

Branch

Bcc, BSR

—

—

—

—

—

—

—

—

—

——

JMP, JSR

—

—

——

—

—

—

——

—

RTS

———

—

—

—

—

—

—

—

—

—

TRAPA

—

—

—

—

—

—

—

—

—

—

—

—

RTE

———

—

—

—

—

—

—

—

—

—

SLEEP

—

—

—

—

—

—

—

—

—

—

—

—

LDC

B

B

W

W

W

W

—

W

W

—

—

—

—

STC

—

B

W

W

W

W

—

W

W

—

—

—

—

ANDC, ORC,

B

—

—

—

—

—

—

—

—

—

—

—

—

XORC

NOP

—

—

—

—

—

—

—

—

—

—

—

—

Block data transfer

—

—

—

—

—

—

—

—

—

—

—

—

BW

Legend

B:

Byte

W: Word

L:

Longword

Data

transfer

Arithmetic

operations

System

control

27

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