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layout and printed circuit design minimizes the voltage

spikes in the converter. Consider, as an example, the turnoff

transition of the upper PWM MOSFET. Prior to turnoff, the

upper MOSFET was carrying the full load current. During the

turnoff, current stops flowing in the upper MOSFET and is

picked up by the lower MOSFET (and/or parallel Schottky

diode). Any inductance in the switched current path

generates a large voltage spike during the switching interval.

Careful component selection, tight layout of the critical

components, and short, wide circuit traces minimize the

magnitude of voltage spikes. Contact Intersil for evaluation

board drawings of the component placement and printed

circuit board.

There are two sets of critical components in a DC-DC

converter using a HIP6017 controller. The power

components are the most critical because they switch large

amounts of energy. The critical small signal components

connect to sensitive nodes or supply critical bypassing

current.

The power components should be placed first. Locate the

input capacitors close to the power switches. Minimize the

length of the connections between the input capacitors and

the power switches. Locate the output inductor and output

capacitors between the MOSFETs and the load. Locate the

PWM controller close to the MOSFETs.

The critical small signal components include the bypass

these components close to their connecting pins on the

control IC. Minimize any leakage current paths from SS

node because the internal current source is only 11

µA.

A multi-layer printed circuit board is recommended.

Figure 10 shows the connections of the critical components

in the converter. Note that capacitors CIN and COUT could

each represent numerous physical capacitors. Dedicate one

solid layer for a ground plane and make all critical

component ground connections with vias to this layer.

Dedicate another solid layer as a power plane and break this

plane into smaller islands of common voltage levels. The

power plane should support the input power and output

power nodes. Use copper filled polygons on the top and

bottom circuit layers for the phase nodes. Use the remaining

printed circuit layers for small signal wiring. The wiring traces

from the control IC to the MOSFET gate and source should

be sized to carry 1A currents. The traces for OUT2 need

IC.

PWM Controller Feedback Compensation

Both PWM controllers use voltage-mode control for output

regulation. This section highlights the design consideration

for a voltage-mode controller. Apply the methods and

considerations to both PWM controllers.

Figure 11 highlights the voltage-mode control loop for a

synchronous-rectified buck converter. The output voltage is

regulated to the reference voltage level. The reference

voltage level is the DAC output voltage for the PWM

the oscillator (OSC) triangular wave to provide a pulse-width

Q1

Q2

+12V

VIA CONNECTION TO GROUND PLANE

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT PLANE LAYER

CR1

FIGURE 10. PRINTED CIRCUIT BOARD POWER PLANES AND

ISLANDS

KEY

HIP6018

SS PGND

LGATE1

UGATE1

PHASE1

GATE3

VCC

GND

VIN2

Q3

VOUT2

OCSET1

FIGURE 11. VOLTAGE-MODE BUCK CONVERTER

COMPENSATION DESIGN

OSC

REFERENCE

ESR

OSC

ERROR

AMP

PWM

DRIVER

(PARASITIC)

+

-

REFERENCE

R1

R3

R2

C3

C2

C1

COMP

FB

HIP6017

COMP

DRIVER

DETAILED FEEDBACK COMPENSATION

PHASE

+

-

+

-

HIP6017